From patchwork Fri Mar 4 15:35:46 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12769356 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 705ACC433EF for ; Fri, 4 Mar 2022 15:41:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=s12gQSbkVA4MVivmpH/zzoId6XPsXkJKPZUdURSqRWw=; b=UcIw79mgiFv6K2 q/d5fGBPF0DPFwDXlpA3WnIMmpEacTAmhP/zcpK9CH3j9/kss1izV63hLFt58NC/YPFCYKBq+X+6l vtMv/HtfmAW38ZxLOJPQVhk98jLYAP+t54zff1Jt8TW9G1ymLprsof/SClKpDAh512gYiUnu4TBeQ ARa68c+HWkTzndrDzUoGuwmNfHf/umUjt852ihYCZuhTqS3JNHBOaVJODFKKRRSgllG2gx94au9e+ inGHwodPfRDZxEPqqUile9oTy07IYYUQlV6zOpXn0I485wOS1GYT/zqRg7AIX94dDHfjcS/7ngyEV eleGgA6tW6PPb8c8ag2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQA2C-00AnOK-To; Fri, 04 Mar 2022 15:40:02 +0000 Received: from ssl.serverraum.org ([2a01:4f8:151:8464::1:2]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nQ9yi-00Al69-8w for linux-arm-kernel@lists.infradead.org; Fri, 04 Mar 2022 15:36:26 +0000 Received: from mwalle01.kontron.local. (unknown [213.135.10.150]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 26619223F6; Fri, 4 Mar 2022 16:36:19 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1646408179; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=xMCJ+lU+MWE4vqOFR8IKh9GXlrMyHGvoO37Jb4co/D8=; b=OfvQnuzFi9WBj10hhC1dYjn6edDlZmbWNp1hPMCBq0EfGLqIxvexrSBrYzsr1n/dzqRiHM iTUFmIZSWH25/f8xp/K04SZIExeSeJG8ywnKVhSphJxoeghwKPIKYrJwRwOJOL2YfBG7py 9YHkt2aXBcmpEdKki994k/4/m9fivwM= From: Michael Walle To: Kavyasree Kotagiri , Nicolas Ferre Cc: Arnd Bergmann , Olof Johansson , soc@kernel.org, linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Rob Herring , Krzysztof Kozlowski , Alexandre Belloni , Claudiu Beznea , Michael Walle Subject: [PATCH v2 5/7] ARM: dts: lan966x: add flexcom SPI nodes Date: Fri, 4 Mar 2022 16:35:46 +0100 Message-Id: <20220304153548.3364480-6-michael@walle.cc> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220304153548.3364480-1-michael@walle.cc> References: <20220304153548.3364480-1-michael@walle.cc> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220304_073624_507214_97F38576 X-CRM114-Status: GOOD ( 10.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add all the SPI nodes for the flexcom IP block. Keep them disabled by default. Signed-off-by: Michael Walle Reviewed-by: Claudiu Beznea --- arch/arm/boot/dts/lan966x.dtsi | 75 ++++++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/arch/arm/boot/dts/lan966x.dtsi b/arch/arm/boot/dts/lan966x.dtsi index d7eacb0144f5..a61d394ad04d 100644 --- a/arch/arm/boot/dts/lan966x.dtsi +++ b/arch/arm/boot/dts/lan966x.dtsi @@ -105,6 +105,21 @@ usart0: serial@200 { atmel,fifo-size = <32>; status = "disabled"; }; + + spi0: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(3)>, + <&dma0 AT91_XDMAC_DT_PERID(2)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "spi_clk"; + atmel,fifo-size = <32>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; flx1: flexcom@e0044000 { @@ -128,6 +143,21 @@ usart1: serial@200 { atmel,fifo-size = <32>; status = "disabled"; }; + + spi1: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(5)>, + <&dma0 AT91_XDMAC_DT_PERID(4)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "spi_clk"; + atmel,fifo-size = <32>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; trng: rng@e0048000 { @@ -168,6 +198,21 @@ usart2: serial@200 { atmel,fifo-size = <32>; status = "disabled"; }; + + spi2: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(7)>, + <&dma0 AT91_XDMAC_DT_PERID(6)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "spi_clk"; + atmel,fifo-size = <32>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; flx3: flexcom@e0064000 { @@ -191,6 +236,21 @@ usart3: serial@200 { atmel,fifo-size = <32>; status = "disabled"; }; + + spi3: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(9)>, + <&dma0 AT91_XDMAC_DT_PERID(8)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "spi_clk"; + atmel,fifo-size = <32>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; dma0: dma-controller@e0068000 { @@ -233,6 +293,21 @@ usart4: serial@200 { atmel,fifo-size = <32>; status = "disabled"; }; + + spi4: spi@400 { + compatible = "atmel,at91rm9200-spi"; + reg = <0x400 0x200>; + interrupts = ; + dmas = <&dma0 AT91_XDMAC_DT_PERID(11)>, + <&dma0 AT91_XDMAC_DT_PERID(10)>; + dma-names = "tx", "rx"; + clocks = <&nic_clk>; + clock-names = "spi_clk"; + atmel,fifo-size = <32>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; }; timer0: timer@e008c000 {