@@ -16,6 +16,7 @@
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
+#include <soc/mscc/ocelot.h>
#define MSCC_MIIM_REG_STATUS 0x0
#define MSCC_MIIM_STATUS_STAT_PENDING BIT(2)
@@ -229,11 +230,20 @@ static int mscc_miim_probe(struct platform_device *pdev)
regs = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
if (IS_ERR(regs)) {
- dev_err(dev, "Unable to map MIIM registers\n");
- return PTR_ERR(regs);
- }
+ /* Fall back to using IORESOURCE_REG, which is possible in an
+ * MFD configuration
+ */
+ res = platform_get_resource(pdev, IORESOURCE_REG, 0);
+ if (!res) {
+ dev_err(dev, "Unable to get MIIM resource\n");
+ return -ENODEV;
+ }
- mii_regmap = devm_regmap_init_mmio(dev, regs, &mscc_miim_regmap_config);
+ mii_regmap = ocelot_get_regmap_from_resource(dev, res);
+ } else {
+ mii_regmap = devm_regmap_init_mmio(dev, regs,
+ &mscc_miim_regmap_config);
+ }
if (IS_ERR(mii_regmap)) {
dev_err(dev, "Unable to create MIIM regmap\n");
@@ -251,10 +261,15 @@ static int mscc_miim_probe(struct platform_device *pdev)
phy_regmap = devm_regmap_init_mmio(dev, phy_regs,
&mscc_miim_regmap_config);
- if (IS_ERR(phy_regmap)) {
- dev_err(dev, "Unable to create phy register regmap\n");
- return PTR_ERR(phy_regmap);
- }
+ } else {
+ res = platform_get_resource(pdev, IORESOURCE_REG, 1);
+ if (res)
+ phy_regmap = ocelot_get_regmap_from_resource(dev, res);
+ }
+
+ if (IS_ERR(phy_regmap)) {
+ dev_err(dev, "Unable to create phy register regmap\n");
+ return PTR_ERR(phy_regmap);
}
ret = mscc_miim_setup(dev, &bus, "mscc_miim", mii_regmap, 0);
There are a few Ocelot chips that contain the logic for this bus, but are controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped. Add support for these non-memory-mapped configurations. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> --- drivers/net/mdio/mdio-mscc-miim.c | 31 +++++++++++++++++++++++-------- 1 file changed, 23 insertions(+), 8 deletions(-)