diff mbox series

[12/14] ARM: dts: suniv: licheepi-nano: add SPI flash

Message ID 20220307143421.1106209-13-andre.przywara@arm.com (mailing list archive)
State New, archived
Headers show
Series ARM: suniv: dts: update Allwinner F1C100 | expand

Commit Message

Andre Przywara March 7, 2022, 2:34 p.m. UTC
Most LicheePi Nano boards come with soldered SPI flash, so enable SPI0
in the .dts and describe the flash chip. There is evidence of different
flash chips used, also of boards with no flash chip soldered, but the
Winbond 16MiB model is the most common, so use that for the compatible
string.  The actual flash chip model will be auto-detected at runtime
anyway.

Signed-off-by: Andre Przywara <andre.przywara@arm.com>
---
 arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts | 15 +++++++++++++++
 1 file changed, 15 insertions(+)

Comments

Samuel Holland March 11, 2022, 2:20 a.m. UTC | #1
On 3/7/22 8:34 AM, Andre Przywara wrote:
> Most LicheePi Nano boards come with soldered SPI flash, so enable SPI0
> in the .dts and describe the flash chip. There is evidence of different
> flash chips used, also of boards with no flash chip soldered, but the
> Winbond 16MiB model is the most common, so use that for the compatible
> string.  The actual flash chip model will be auto-detected at runtime
> anyway.
> 
> Signed-off-by: Andre Przywara <andre.przywara@arm.com>

Acked-by: Samuel Holland <samuel@sholland.org>
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
index 8fa79a1d1d2d..04e59b8381cb 100644
--- a/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
+++ b/arch/arm/boot/dts/suniv-f1c100s-licheepi-nano.dts
@@ -13,6 +13,7 @@  / {
 	aliases {
 		mmc0 = &mmc0;
 		serial0 = &uart0;
+		spi0 = &spi0;
 	};
 
 	chosen {
@@ -35,6 +36,20 @@  &mmc0 {
 	vmmc-supply = <&reg_vcc3v3>;
 };
 
+&spi0 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&spi0_pc_pins>;
+	status = "okay";
+
+	flash@0 {
+		#address-cells = <1>;
+		#size-cells = <1>;
+		compatible = "winbond,w25q128", "jedec,spi-nor";
+		reg = <0>;
+		spi-max-frequency = <40000000>;
+	};
+};
+
 &uart0 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&uart0_pe_pins>;