From patchwork Tue Mar 8 00:09:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Brian Norris X-Patchwork-Id: 12772780 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D59D0C433F5 for ; Tue, 8 Mar 2022 00:12:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=IA7Tfs2tiAjppg2IBLDhPP+zuvtvzhR33igofImHnWs=; b=DUDmI7Vn000N3l 8Jp7s0wy2dN8fJWeRTnlHAg5q6ocKwb9Rwxew8g1kIh477VIOCRc7Jmj8hCbeXNCp2jv8CHzhzhum D79rhZtgnUVMLWhGTLD/GlqCb4oMP4psaQXECpFEcDd1Cl3ssTo6raCN49nS/HM4KKSsxlPfwvqPv fcoJG94lngnRZCyDoE1zdbhW1B7t5d5gvtwPmuK12hv10V5o/WnjLXKoBO3ut7N6oIElOzjVuh1Xl Ipy0MjECVCiwD7NCtG4Sdge+Cr1RN4IWajhjTgX6St2TI2NJ6Qx7a3rwAHz53u3oHrOG9lF+/aXd3 L3vdyB7XQiYlII3ZSKww==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nRNRj-0022vI-HJ; Tue, 08 Mar 2022 00:11:24 +0000 Received: from mail-pl1-x629.google.com ([2607:f8b0:4864:20::629]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nRNQc-0022H7-DV for linux-arm-kernel@lists.infradead.org; Tue, 08 Mar 2022 00:10:16 +0000 Received: by mail-pl1-x629.google.com with SMTP id n2so6004398plf.4 for ; Mon, 07 Mar 2022 16:10:13 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=9DsPzlIyhwiKh9kSwdMVXp8vwwz1bE2ouL+bXEUROQw=; b=ObutdUvDeNU9/Wlev57ZphfiNYkPKdRx0Vk7ljvt9DfEErSAQZwkpEGHFPFRsni0wS 4k9/ucgGDth6GriLixSizUhHBkXCLW3Alnw8YCQpfF46Z+A5rwUDjfHa1fiIgCiCiwYo 4bDmMfLwOXftGl+n/XDCYGcyY4zJJEYliEsQU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=9DsPzlIyhwiKh9kSwdMVXp8vwwz1bE2ouL+bXEUROQw=; b=CABGx40HqQxlkCCQ+JHB3HF4wvctQKmenYuSl8TbP4Cc5x5C6hGWGNlRCSLw54umFb ke7iQ7gCjcGhleImEcFV31U+RD2SNwN30koki/mUjeQmN2Oqlf8MHtAMzdnmCiCdSrFf qfsysZOwQxaGQJzoeCm6yoDOXwqDVFoTwMEP9fR6FyfbyqsZNp19o3HmGvsMyFbS1h1Q x1oghpE9NYdxFlSAxKG5Dy4nQXbLeY2h1icD3IIDAl7/xuEJksti/HhfZ4lEiAo2OiYw lJoYbJBrSIa07zqlOeDBl+xQazf1nvlj8/tJVHSmmicjZJMTU4PoFEHENVBW2BJiCEQ5 QK3Q== X-Gm-Message-State: AOAM533vkl1ot8VH01j7Tx7zUgic+LOiMVXE8q/7eSxNEAP5yE9snc9Q bWCj/2gJ8nmzyKkqqdBruqfRfQ== X-Google-Smtp-Source: ABdhPJx4ooAkyw+rxawtckEW2qNYCpse5tIF/afponFdY+RwJ3scPkG7xqLG4qC/Ubu7uWbU7zfEuA== X-Received: by 2002:a17:90b:788:b0:1bf:41d:a9ff with SMTP id l8-20020a17090b078800b001bf041da9ffmr1650623pjz.116.1646698213306; Mon, 07 Mar 2022 16:10:13 -0800 (PST) Received: from localhost ([2620:15c:202:201:e551:44dc:2842:57f1]) by smtp.gmail.com with UTF8SMTPSA id lb4-20020a17090b4a4400b001b9b20eabc4sm477883pjb.5.2022.03.07.16.10.11 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Mar 2022 16:10:12 -0800 (PST) From: Brian Norris To: MyungJoo Ham , Kyungmin Park , Chanwoo Choi , Rob Herring Cc: Lin Huang , Heiko Stuebner , Derek Basehore , linux-rockchip@lists.infradead.org, linux-kernel@vger.kernel.org, linux-pm@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Brian Norris , Rob Herring Subject: [PATCH v3 04/15] dt-bindings: devfreq: rk3399_dmc: Specify idle params in nanoseconds Date: Mon, 7 Mar 2022 16:09:34 -0800 Message-Id: <20220307160918.v3.4.I01c6a2b2db578136686b42d463af985cfdff2fd9@changeid> X-Mailer: git-send-email 2.35.1.616.g0bdcbb4464-goog In-Reply-To: <20220308000945.706701-1-briannorris@chromium.org> References: <20220308000945.706701-1-briannorris@chromium.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220307_161014_477868_5314DC63 X-CRM114-Status: GOOD ( 15.31 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org It's inefficient to use the same number of cycles for all OPPs, since lower frequencies make for longer idle times. Let's specify the idle time instead, so software can pick the optimal number of cycles on its own. NB: these bindings aren't used anywhere yet. Signed-off-by: Brian Norris Reviewed-by: Rob Herring Reviewed-by: Krzysztof Kozlowski --- Changes in v3: * Add Reviewed-by Changes in v2: * New patch .../bindings/devfreq/rk3399_dmc.yaml | 50 +++++++++++++++++-- 1 file changed, 45 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml index 2904ae4115f3..6a33a7b44741 100644 --- a/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml +++ b/Documentation/devicetree/bindings/devfreq/rk3399_dmc.yaml @@ -56,42 +56,52 @@ properties: being used. rockchip,pd_idle: + deprecated: true $ref: /schemas/types.yaml#/definitions/uint32 description: Configure the PD_IDLE value. Defines the power-down idle period in which memories are placed into power-down mode if bus is idle for PD_IDLE DFI clock cycles. + See also rockchip,pd-idle-ns. rockchip,sr_idle: + deprecated: true $ref: /schemas/types.yaml#/definitions/uint32 description: Configure the SR_IDLE value. Defines the self-refresh idle period in which memories are placed into self-refresh mode if bus is idle for SR_IDLE * 1024 DFI clock cycles (DFI clocks freq is half of DRAM clock). Default value is "0". + See also rockchip,sr-idle-ns. rockchip,sr_mc_gate_idle: + deprecated: true $ref: /schemas/types.yaml#/definitions/uint32 description: Defines the memory self-refresh and controller clock gating idle period. Memories are placed into self-refresh mode and memory controller clock arg gating started if bus is idle for sr_mc_gate_idle*1024 DFI clock cycles. + See also rockchip,sr-mc-gate-idle-ns. rockchip,srpd_lite_idle: + deprecated: true $ref: /schemas/types.yaml#/definitions/uint32 description: Defines the self-refresh power down idle period in which memories are placed into self-refresh power down mode if bus is idle for srpd_lite_idle * 1024 DFI clock cycles. This parameter is for LPDDR4 only. + See also rockchip,srpd-lite-idle-ns. rockchip,standby_idle: + deprecated: true $ref: /schemas/types.yaml#/definitions/uint32 description: Defines the standby idle period in which memories are placed into self-refresh mode. The controller, pi, PHY and DRAM clock will be gated if bus is idle for standby_idle * DFI clock cycles. + See also rockchip,standby-idle-ns. rockchip,dram_dll_dis_freq: deprecated: true @@ -260,6 +270,36 @@ properties: When the DRAM type is LPDDR4, this parameter defines the PHY side ODT strength. Default value is 60. + rockchip,pd-idle-ns: + description: + Configure the PD_IDLE value in nanoseconds. Defines the power-down idle + period in which memories are placed into power-down mode if bus is idle + for PD_IDLE nanoseconds. + + rockchip,sr-idle-ns: + description: + Configure the SR_IDLE value in nanoseconds. Defines the self-refresh idle + period in which memories are placed into self-refresh mode if bus is idle + for SR_IDLE nanoseconds. Default value is "0". + + rockchip,sr-mc-gate-idle-ns: + description: + Defines the memory self-refresh and controller clock gating idle period in nanoseconds. + Memories are placed into self-refresh mode and memory controller clock + arg gating started if bus is idle for sr_mc_gate_idle nanoseconds. + + rockchip,srpd-lite-idle-ns: + description: + Defines the self-refresh power down idle period in which memories are + placed into self-refresh power down mode if bus is idle for + srpd_lite_idle nanoseonds. This parameter is for LPDDR4 only. + + rockchip,standby-idle-ns: + description: + Defines the standby idle period in which memories are placed into + self-refresh mode. The controller, pi, PHY and DRAM clock will be gated + if bus is idle for standby_idle nanoseconds. + required: - compatible - devfreq-events @@ -283,11 +323,11 @@ examples: clock-names = "dmc_clk"; operating-points-v2 = <&dmc_opp_table>; center-supply = <&ppvar_centerlogic>; - rockchip,pd_idle = <0x40>; - rockchip,sr_idle = <0x2>; - rockchip,sr_mc_gate_idle = <0x3>; - rockchip,srpd_lite_idle = <0x4>; - rockchip,standby_idle = <0x2000>; + rockchip,pd-idle-ns = <160>; + rockchip,sr-idle-ns = <10240>; + rockchip,sr-mc-gate-idle-ns = <40960>; + rockchip,srpd-lite-idle-ns = <61440>; + rockchip,standby-idle-ns = <81920>; rockchip,ddr3_odt_dis_freq = <333000000>; rockchip,lpddr3_odt_dis_freq = <333000000>; rockchip,lpddr4_odt_dis_freq = <333000000>;