From patchwork Fri Mar 11 01:54:57 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TmFuY3kgTGluICjmnpfmrKPonqIp?= X-Patchwork-Id: 12777274 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 50FADC433F5 for ; Fri, 11 Mar 2022 02:05:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=6N7vM6yE4V5zRxya2cL9DpQqExHYu2TOJfpUhTeR4no=; b=mwxCgblR6JPd0e IksmCIjxTRn5il4acizyBy9Krx3cAwsxM6PGgrxUs9TdTZOPSmLwhza16pbMZU2hjhmIYAZ8LXK0V wKcmXTFWwDD2UaF0mhy8lgcJVRhWSti1beaqy6ifJUHBT2ehN+qTVjSlmEfMnFelgb9a9ppwJr0OW fVeGcXfN0N1Xph1YJO6/h40EI4ihBxHhNvdM4vkrgzAmeAEHIJO4y+DzjyV8jP9HijXmLV3MOH9Vs xa9HH8v/Wcqz2Ld4FDTWY+zA2lV0y+Ddt/GfxYy8of/BhlH9CVp96Gq44/mYpEYGijbvZMF0LV2sF 2yM/BFDmGuQeCrH9Epew==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nSUdx-00Ebjb-7L; Fri, 11 Mar 2022 02:04:37 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nSUaR-00Ea6C-Km; Fri, 11 Mar 2022 02:01:01 +0000 X-UUID: 2f92b42de32a419db40ccee2df52459c-20220310 X-UUID: 2f92b42de32a419db40ccee2df52459c-20220310 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1917678305; Thu, 10 Mar 2022 19:00:46 -0700 Received: from mtkmbs10n1.mediatek.inc (172.21.101.34) by MTKMBS62N1.mediatek.inc (172.29.193.41) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 10 Mar 2022 17:55:11 -0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n1.mediatek.inc (172.21.101.34) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.15; Fri, 11 Mar 2022 09:55:09 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 11 Mar 2022 09:55:09 +0800 From: Nancy.Lin To: Rob Herring , Matthias Brugger , Chun-Kuang Hu , "Philipp Zabel" , , "AngeloGioacchino Del Regno" , CC: David Airlie , Daniel Vetter , "Nathan Chancellor" , Nick Desaulniers , "Nancy . Lin" , "jason-jh . lin" , Yongqiang Niu , , , , , , , , , Subject: [PATCH v15 13/22] drm/mediatek: add display merge mute/unmute support for MT8195 Date: Fri, 11 Mar 2022 09:54:57 +0800 Message-ID: <20220311015506.11232-14-nancy.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220311015506.11232-1-nancy.lin@mediatek.com> References: <20220311015506.11232-1-nancy.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220310_180059_730158_E005803B X-CRM114-Status: GOOD ( 12.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add merge mute/unmute setting for MT8195. MT8195 Vdosys1 merge1~merge4 support HW mute function. Signed-off-by: Nancy.Lin Reviewed-by: Chun-Kuang Hu Reviewed-by: AngeloGioacchino Del Regno --- drivers/gpu/drm/mediatek/mtk_disp_merge.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c index c0d9b43b2a66..9dca145cfb71 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c @@ -58,12 +58,15 @@ #define FLD_PREULTRA_TH_LOW GENMASK(15, 0) #define FLD_PREULTRA_TH_HIGH GENMASK(31, 16) +#define DISP_REG_MERGE_MUTE_0 0xf00 + struct mtk_disp_merge { void __iomem *regs; struct clk *clk; struct clk *async_clk; struct cmdq_client_reg cmdq_reg; bool fifo_en; + bool mute_support; }; void mtk_merge_start(struct device *dev) @@ -82,6 +85,10 @@ void mtk_merge_start_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt) { struct mtk_disp_merge *priv = dev_get_drvdata(dev); + if (priv->mute_support) + mtk_ddp_write(cmdq_pkt, 0x0, &priv->cmdq_reg, priv->regs, + DISP_REG_MERGE_MUTE_0); + mtk_ddp_write(cmdq_pkt, 1, &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CTRL); } @@ -90,6 +97,10 @@ void mtk_merge_stop_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt) { struct mtk_disp_merge *priv = dev_get_drvdata(dev); + if (priv->mute_support) + mtk_ddp_write(cmdq_pkt, 0x1, &priv->cmdq_reg, priv->regs, + DISP_REG_MERGE_MUTE_0); + mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CTRL); } @@ -264,6 +275,8 @@ static int mtk_disp_merge_probe(struct platform_device *pdev) priv->fifo_en = of_property_read_bool(dev->of_node, "mediatek,merge-fifo-en"); + priv->mute_support = of_property_read_bool(dev->of_node, + "mediatek,merge-mute"); platform_set_drvdata(pdev, priv); ret = component_add(dev, &mtk_disp_merge_component_ops);