From patchwork Tue Mar 15 21:19:33 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12781853 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 7DE77C433F5 for ; Tue, 15 Mar 2022 21:22:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=yL5uGKYms01M5VeLkNsz3D7Vy5b6nxIss5GiNEc50Rs=; b=ShTap5HkDHlLgc EBnIyObAL9W0zSO84CysCEkTYJ80mRZ+VS4+2fFXZ+rqxQDxYccr4zg84uOD/QR3qVORC07GRacCT qvD9C/0FoIzJ+kzsUp/Pmi2Q6+/vmNNqzZeT4m8FTyptMHk17Rcazw96jGbwI0/RermsPyLq7v2QU x3GB5T2o+0by5B/krcNZV22Q3979EgDcChppI90oSRzKsCn4hdemwHVXe87q6yvUfwrPPk9TQZmq1 P1/TwQnFo1GvRQ2h9Zd8onKyplOOI0Nj3E/EOOE/AdaKvP77UyXWfB4fEFC5JSec9ZK10dnDtJCCG fq6nAFWWmTZP0yNBS4jw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUEbh-00AeCp-6S; Tue, 15 Mar 2022 21:21:29 +0000 Received: from bhuna.collabora.co.uk ([2a00:1098:0:82:1000:25:2eeb:e3e3]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nUEb8-00AdzS-V9; Tue, 15 Mar 2022 21:20:56 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 0FC1B1F42BBB DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1647379248; bh=tQqfNRntYK0gQYFiWjGgyBq66FzjlHnza9MyAlo7SoY=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=hBQpOiLZ7B6v9RyVoB7nXjXGpkZ25gXuYbYIgCqlkpm+xRAMCF6EfeLPONjrYSBF6 3BPu2Y5f6SdfnPt0+7opbJv0GCM404MYieMopv/UJW3wmll+MTLbUAppDR1sxw9bhS r7loE7VPvhDZscgTbBdVii6WyV0natSXJ9UJRDkI98IvKP3kPIbFL7r8s5q86rL1qC dNZU2vOiIEcNWUtohsZ3pnRnX/AvAPj9NXGBqrF+ssRixJLjMV7ZmNq4qiuKA2YMN3 ccHfr8ADDwySkzeFUtE4C54Ovk7FP03d7N/hFawan7LYrhHRDMlC1rzQe1x/xEIFlR DC8Ktt8DI239w== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Linus Walleij , Rob Herring Cc: kernel@collabora.com, AngeloGioacchino Del Regno , =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= , Matthias Brugger , Sean Wang , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-gpio@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v1 1/4] dt-bindings: pinctrl: mt8192: Add wrapping node for pin configurations Date: Tue, 15 Mar 2022 17:19:33 -0400 Message-Id: <20220315211936.442708-2-nfraprado@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220315211936.442708-1-nfraprado@collabora.com> References: <20220315211936.442708-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220315_142055_279404_42A4097C X-CRM114-Status: GOOD ( 16.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On mt8192, the pinctrl node has pinctrl groups to group pin configurations. Each pinctrl group contains one or more pinmux subnodes to list needed pins and their configurations. By supporting multiple subnodes, we can configure different pin characteristics (driving/pull-up/pull-down/etc.) in a pinctrl group. Update the mt8192 pinctrl dt-binding to add the missing pinctrl group node that wraps the pinmux subnodes and update the example at the end. While at it, also remove the example embedded in the description since it is redundant to the already supplied example at the end. This same change was done for mt8195 in commit 79dcd4e840cc ("dt-bindings: pinctrl: mt8195: add wrapping node of pin configurations"). Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno Reviewed-by: Rob Herring --- .../bindings/pinctrl/pinctrl-mt8192.yaml | 92 ++++++++++--------- 1 file changed, 47 insertions(+), 45 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml index 3c84676a167d..d63e23d9ed16 100644 --- a/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml +++ b/Documentation/devicetree/bindings/pinctrl/pinctrl-mt8192.yaml @@ -51,62 +51,55 @@ properties: #PIN CONFIGURATION NODES patternProperties: - '^pins': + '-pins$': type: object - description: | - A pinctrl node should contain at least one subnodes representing the - pinctrl groups available on the machine. Each subnode will list the - pins it needs, and how they should be configured, with regard to muxer - configuration, pullups, drive strength, input enable/disable and - input schmitt. - An example of using macro: - pincontroller { - /* GPIO0 set as multifunction GPIO0 */ - state_0_node_a { - pinmux = ; - }; - /* GPIO1 set as multifunction PWM */ - state_0_node_b { - pinmux = ; - }; - }; - $ref: "pinmux-node.yaml" - - properties: - pinmux: + additionalProperties: false + patternProperties: + '^pins': + type: object description: | - Integer array, represents gpio pin number and mux setting. - Supported pin number and mux varies for different SoCs, and are defined - as macros in dt-bindings/pinctrl/-pinfunc.h directly. + A pinctrl node should contain at least one subnodes representing the + pinctrl groups available on the machine. Each subnode will list the + pins it needs, and how they should be configured, with regard to muxer + configuration, pullups, drive strength, input enable/disable and + input schmitt. + $ref: "pinmux-node.yaml" - drive-strength: - description: | - It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See - dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192. - enum: [2, 4, 6, 8, 10, 12, 14, 16] + properties: + pinmux: + description: | + Integer array, represents gpio pin number and mux setting. + Supported pin number and mux varies for different SoCs, and are defined + as macros in dt-bindings/pinctrl/-pinfunc.h directly. - bias-pull-down: true + drive-strength: + description: | + It can support some arguments, such as MTK_DRIVE_4mA, MTK_DRIVE_6mA, etc. See + dt-bindings/pinctrl/mt65xx.h. It can only support 2/4/6/8/10/12/14/16mA in mt8192. + enum: [2, 4, 6, 8, 10, 12, 14, 16] - bias-pull-up: true + bias-pull-down: true - bias-disable: true + bias-pull-up: true - output-high: true + bias-disable: true - output-low: true + output-high: true - input-enable: true + output-low: true - input-disable: true + input-enable: true - input-schmitt-enable: true + input-disable: true - input-schmitt-disable: true + input-schmitt-enable: true - required: - - pinmux + input-schmitt-disable: true - additionalProperties: false + required: + - pinmux + + additionalProperties: false allOf: - $ref: "pinctrl.yaml#" @@ -151,8 +144,17 @@ examples: interrupts = ; #interrupt-cells = <2>; - pins { - pinmux = ; - output-low; + spi1-default-pins { + pins-cs-mosi-clk { + pinmux = , + , + ; + bias-disable; + }; + + pins-miso { + pinmux = ; + bias-pull-down; + }; }; };