From patchwork Fri Mar 18 14:19:48 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?TmFuY3kgTGluICjmnpfmrKPonqIp?= X-Patchwork-Id: 12785353 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9FA87C433F5 for ; Fri, 18 Mar 2022 14:35:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=FEaoEk79dtKCmcyLFSMncQlYhBe7uabq7sZZOhTDcSU=; b=2GrUULs1jNno9Z IA3PDBaJGJPydVOOy5kbMFIu9kw7cEdW5sfydTHrNEe0rYTUGlNE46hJoNq4CkFBhrSvk9srM1WK9 MQ/coEOqV6Ufk6ImdV2lNnv2qEN2L9PfnVQQV2wh3GT2CuAHInTjdyy1shqG7jAOx//NKMjOzBpaS LRPCuRpbDQuRgt1GYtIRd5OFc2rvBTzd/cNwC88snnxPKko0aLWybpBz/lsLv1+yN7BlzIUGDKsFx vOhQ2blHxzjObJpYqLeNw/sn5KT5qCbp1yQ56icELYBSoepbHdzPix/IjicViIlcy+OMbjPNztoKi 2C4ymuKxxNqyFkzrF9+Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nVDgH-001yHu-Ow; Fri, 18 Mar 2022 14:34:18 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nVDcc-001wnT-8g; Fri, 18 Mar 2022 14:30:32 +0000 X-UUID: e59688afff7c4dabb77f06bb08d3cc74-20220318 X-UUID: e59688afff7c4dabb77f06bb08d3cc74-20220318 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 79306980; Fri, 18 Mar 2022 07:30:19 -0700 Received: from mtkexhb01.mediatek.inc (172.21.101.102) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 18 Mar 2022 07:20:25 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkexhb01.mediatek.inc (172.21.101.102) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 18 Mar 2022 22:20:12 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 18 Mar 2022 22:20:12 +0800 From: Nancy.Lin To: Rob Herring , Matthias Brugger , Chun-Kuang Hu , "Philipp Zabel" , , "AngeloGioacchino Del Regno" , CC: David Airlie , Daniel Vetter , "Nathan Chancellor" , Nick Desaulniers , "Nancy . Lin" , "jason-jh . lin" , Yongqiang Niu , , , , , , , , , Subject: [PATCH v16 01/22] dt-bindings: mediatek: add vdosys1 RDMA definition for mt8195 Date: Fri, 18 Mar 2022 22:19:48 +0800 Message-ID: <20220318142009.2796-2-nancy.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220318142009.2796-1-nancy.lin@mediatek.com> References: <20220318142009.2796-1-nancy.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220318_073030_389136_72C9AC84 X-CRM114-Status: GOOD ( 14.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add vdosys1 RDMA definition. Signed-off-by: Nancy.Lin Reviewed-by: AngeloGioacchino Del Regno --- .../arm/mediatek/mediatek,mdp-rdma.yaml | 86 +++++++++++++++++++ 1 file changed, 86 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml new file mode 100644 index 000000000000..6ab773569462 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mdp-rdma.yaml @@ -0,0 +1,86 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/arm/mediatek/mediatek,mdp-rdma.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Mediatek MDP RDMA + +maintainers: + - Matthias Brugger + +description: | + The mediatek MDP RDMA stands for Read Direct Memory Access. + It provides real time data to the back-end panel driver, such as DSI, + DPI and DP_INTF. + It contains one line buffer to store the sufficient pixel data. + RDMA device node must be siblings to the central MMSYS_CONFIG node. + For a description of the MMSYS_CONFIG binding, see + Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml for details. + +properties: + compatible: + oneOf: + - items: + - const: mediatek,mt8195-vdo1-rdma + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + power-domains: + description: A phandle and PM domain specifier as defined by bindings of + the power controller specified by phandle. See + Documentation/devicetree/bindings/power/power-domain.yaml for details. + + clocks: + items: + - description: RDMA Clock + + iommus: + description: + This property should point to the respective IOMMU block with master port as argument, + see Documentation/devicetree/bindings/iommu/mediatek,iommu.yaml for details. + + mediatek,gce-client-reg: + description: + The register of display function block to be set by gce. There are 4 arguments, + such as gce node, subsys id, offset and register size. The subsys id that is + mapping to the register of display function blocks is defined in the gce header + include/include/dt-bindings/gce/-gce.h of each chips. + $ref: /schemas/types.yaml#/definitions/phandle-array + maxItems: 1 + +required: + - compatible + - reg + - power-domains + - clocks + - iommus + +additionalProperties: false + +examples: + - | + #include + #include + #include + #include + #include + + soc { + #address-cells = <2>; + #size-cells = <2>; + + vdo1_rdma0: mdp-rdma@1c104000 { + compatible = "mediatek,mt8195-vdo1-rdma"; + reg = <0 0x1c104000 0 0x1000>; + interrupts = ; + clocks = <&vdosys1 CLK_VDO1_MDP_RDMA0>; + power-domains = <&spm MT8195_POWER_DOMAIN_VDOSYS1>; + iommus = <&iommu_vdo M4U_PORT_L2_MDP_RDMA0>; + mediatek,gce-client-reg = <&gce0 SUBSYS_1c10XXXX 0x4000 0x1000>; + }; + };