| Message ID | 20220323091932.10648-1-angelogioacchino.delregno@collabora.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2] soc: mediatek: mmsys: Add sw0_rst_offset for MT8192 | expand |
On Wed, 2022-03-23 at 17:19 +0800, AngeloGioacchino Del Regno wrote: > MT8192 has the same sw0 reset offset as MT8186: add the parameter > to be able to use mmsys as a reset controller for managing at > least the DSI reset line. > > Signed-off-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > > v2: Change the offset to 0x160 (as defined for MT8186). Thanks, Rex- > BC! > You are welcome! Reviewed-by: Rex-BC Chen <rex-bc.chen@mediatek.com> > drivers/soc/mediatek/mtk-mmsys.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c > b/drivers/soc/mediatek/mtk-mmsys.c > index 4fc4c2c9ea20..f69521fabcce 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data > mt8192_mmsys_driver_data = { > .clk_driver = "clk-mt8192-mm", > .routes = mmsys_mt8192_routing_table, > .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table), > + .sw0_rst_offset = MT8186_MMSYS_SW0_RST_B, > }; > > static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = > { > -- > 2.35.1 >
On 23/03/2022 10:19, AngeloGioacchino Del Regno wrote: > MT8192 has the same sw0 reset offset as MT8186: add the parameter > to be able to use mmsys as a reset controller for managing at > least the DSI reset line. > > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> Applied thanks! > --- > > v2: Change the offset to 0x160 (as defined for MT8186). Thanks, Rex-BC! > > drivers/soc/mediatek/mtk-mmsys.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c > index 4fc4c2c9ea20..f69521fabcce 100644 > --- a/drivers/soc/mediatek/mtk-mmsys.c > +++ b/drivers/soc/mediatek/mtk-mmsys.c > @@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = { > .clk_driver = "clk-mt8192-mm", > .routes = mmsys_mt8192_routing_table, > .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table), > + .sw0_rst_offset = MT8186_MMSYS_SW0_RST_B, > }; > > static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
diff --git a/drivers/soc/mediatek/mtk-mmsys.c b/drivers/soc/mediatek/mtk-mmsys.c index 4fc4c2c9ea20..f69521fabcce 100644 --- a/drivers/soc/mediatek/mtk-mmsys.c +++ b/drivers/soc/mediatek/mtk-mmsys.c @@ -70,6 +70,7 @@ static const struct mtk_mmsys_driver_data mt8192_mmsys_driver_data = { .clk_driver = "clk-mt8192-mm", .routes = mmsys_mt8192_routing_table, .num_routes = ARRAY_SIZE(mmsys_mt8192_routing_table), + .sw0_rst_offset = MT8186_MMSYS_SW0_RST_B, }; static const struct mtk_mmsys_driver_data mt8365_mmsys_driver_data = {
MT8192 has the same sw0 reset offset as MT8186: add the parameter to be able to use mmsys as a reset controller for managing at least the DSI reset line. Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> --- v2: Change the offset to 0x160 (as defined for MT8186). Thanks, Rex-BC! drivers/soc/mediatek/mtk-mmsys.c | 1 + 1 file changed, 1 insertion(+)