diff mbox series

[4/4] ARM: dts: mstar: Add second UART to base dtsi.

Message ID 20220324124402.3631379-5-daniel@0x0f.com (mailing list archive)
State New, archived
Headers show
Series Add support for MStar MSC313 uarts | expand

Commit Message

Daniel Palmer March 24, 2022, 12:44 p.m. UTC
Add the second UART to the base dtsi.

Signed-off-by: Daniel Palmer <daniel@0x0f.com>
---
 arch/arm/boot/dts/mstar-v7.dtsi | 8 ++++++++
 1 file changed, 8 insertions(+)

Comments

Romain Perier March 25, 2022, 12:25 p.m. UTC | #1
Hi Daniel,


Le jeu. 24 mars 2022 à 13:44, Daniel Palmer <daniel@0x0f.com> a écrit :
>
> Add the second UART to the base dtsi.
>
> Signed-off-by: Daniel Palmer <daniel@0x0f.com>

More context in the long message would help, imho.
Otherwise:
Reviewed-by: Romain Perier <romain.perier@gmail.com>
Rob Herring March 28, 2022, 1:28 p.m. UTC | #2
On Thu, Mar 24, 2022 at 7:44 AM Daniel Palmer <daniel@0x0f.com> wrote:
>
> Add the second UART to the base dtsi.
>
> Signed-off-by: Daniel Palmer <daniel@0x0f.com>
> ---
>  arch/arm/boot/dts/mstar-v7.dtsi | 8 ++++++++
>  1 file changed, 8 insertions(+)
>
> diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
> index 8464a8f1b136..baf2422b9854 100644
> --- a/arch/arm/boot/dts/mstar-v7.dtsi
> +++ b/arch/arm/boot/dts/mstar-v7.dtsi
> @@ -182,6 +182,14 @@ pm_uart: uart@221000 {
>                                 clock-frequency = <172000000>;
>                                 status = "disabled";
>                         };
> +
> +                       uart1: uart@221200 {

serial@...

Please run schema checks on your DT as that should be a warning that I
don't have to tell you about.

Rob
diff mbox series

Patch

diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi
index 8464a8f1b136..baf2422b9854 100644
--- a/arch/arm/boot/dts/mstar-v7.dtsi
+++ b/arch/arm/boot/dts/mstar-v7.dtsi
@@ -182,6 +182,14 @@  pm_uart: uart@221000 {
 				clock-frequency = <172000000>;
 				status = "disabled";
 			};
+
+			uart1: uart@221200 {
+				compatible = "mstar,msc313-uart", "snps,dw-apb-uart";
+				reg = <0x221200 0x100>;
+				reg-shift = <3>;
+				interrupts-extended = <&intc_irq GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
+				status = "disabled";
+			};
 		};
 
 		imi: sram@a0000000 {