From patchwork Thu Mar 31 18:23:26 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?SmFzb24tSkggTGluICjmnpfnnb/npaUp?= X-Patchwork-Id: 12797538 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 74B7CC433EF for ; Thu, 31 Mar 2022 18:25:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=i1dQ6dQVG6jLVi9gQosEcpg6voYPdYrWu+airLGT3yA=; b=NH5CUrK7wlJkTU 8l8IdHw9qI08ywfqNKlUhe41iDHgM79xdGKFhIiK5TrRFoF0hHcMUca41BDqwx6G+gZN+fyKiKm0i 0kns7V2yTMQHxgr7u3wzX8SS2ppigDv7O4qskaCcxpC9YxWTFqVyogXN7T5CxB5Yu9L+ev90u7szT GAuunBzBgwJ1DAD1sSyGKhkFFVvDYtd0oWGMLj7b9dSgi4J7NFHPY1m5hoYk2ub86113QtmZDiXzv Wa4AWcc3qzm9yis+KujXR+5TsLAVrmc8fvt7KGhivIVyzrGbGNyPY/FUTA+S602qJhIyPwaeONp+o GpbQnKDYA3RYFCtE/Pcw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nZzTB-003BAD-Kb; Thu, 31 Mar 2022 18:24:29 +0000 Received: from mailgw02.mediatek.com ([216.200.240.185]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nZzSX-003Atr-VV; Thu, 31 Mar 2022 18:23:51 +0000 X-UUID: 1b8ee5943c7744f9b8a2c756dbe268f8-20220331 X-UUID: 1b8ee5943c7744f9b8a2c756dbe268f8-20220331 Received: from mtkcas66.mediatek.inc [(172.29.193.44)] by mailgw02.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1649873254; Thu, 31 Mar 2022 11:23:36 -0700 Received: from MTKMBS07N2.mediatek.inc (172.21.101.141) by MTKMBS62N2.mediatek.inc (172.29.193.42) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 31 Mar 2022 11:23:34 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 1 Apr 2022 02:23:32 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 1 Apr 2022 02:23:32 +0800 From: jason-jh.lin To: Rob Herring , Matthias Brugger , Chun-Kuang Hu , AngeloGioacchino Del Regno CC: Philipp Zabel , Maxime Coquelin , David Airlie , Daniel Vetter , Alexandre Torgue , "jason-jh . lin" , , , , , "CK Hu" , Fabien Parent , , , , , , , , Subject: [PATCH v17 2/7] dt-bindings: arm: mediatek: mmsys: add mt8195 SoC binding Date: Fri, 1 Apr 2022 02:23:26 +0800 Message-ID: <20220331182331.27205-3-jason-jh.lin@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20220331182331.27205-1-jason-jh.lin@mediatek.com> References: <20220331182331.27205-1-jason-jh.lin@mediatek.com> MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220331_112350_080192_EB1B22A7 X-CRM114-Status: UNSURE ( 9.55 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org In the SoC before, such as mt8173, it has 2 pipelines binding to one mmsys with the same clock driver and the same power domain. In mt8195, there are 4 pipelines binding to 4 different mmsys, such as vdosys0, vdosys1, vppsys0 and vppsys1. Each mmsys uses different clock drivers and different power domain. Since each mmsys has its own clock, they could be identified by the different name of their clock. Signed-off-by: jason-jh.lin Reviewed-by: CK Hu --- .../devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml index 6c2c3edcd443..f71c8dd07bf9 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml @@ -31,6 +31,7 @@ properties: - mediatek,mt8183-mmsys - mediatek,mt8186-mmsys - mediatek,mt8192-mmsys + - mediatek,mt8195-mmsys - mediatek,mt8365-mmsys - const: syscon - items: @@ -65,6 +66,9 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle-array maxItems: 1 + clocks: + maxItems: 1 + "#clock-cells": const: 1