From patchwork Tue Apr 5 11:27:19 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12801450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A1F96C433EF for ; Tue, 5 Apr 2022 11:27:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=HD8d7wWJewPlV0jNtoFwVF1sTLtaMkaC2XOGtajAxsU=; b=W7IixycaQL5YNo FAYt3MHqbcZCe12zhaQ6JunPIXX08AEtKDJ1kz5mwVkKwFXv/BhVYAj+T8DtdngjfZgDyNm4bjf80 IR16LT+bVk29/y6vo2Q37kRzxF58IATGrl7XVxpzUHe76GXAKupWb792oj7Ew2M3eZeXqLEguA9e8 /aRPKc5n3ZFHPTy84yYXCcyx+9b2o660PloLcgg2Qxpyqb3L1/bFuTlnEirjAkiVfrrIpLwtDrrM+ G07z50+OIwwwfUfbotMO8FjKeQRRlvd/TOymSsW209JWF0OUyMXJ/w3KWE2Hy+Hh7wA9KS1qftXj9 Vxr5iTw4ycyWPU3X+XaA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nbhK2-000mso-OB; Tue, 05 Apr 2022 11:26:06 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nbhJW-000miH-J5 for linux-arm-kernel@lists.infradead.org; Tue, 05 Apr 2022 11:25:36 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1649157935; x=1680693935; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=8n2YxQNWVhdkwtjAv52Li27hbMlbmN6l6OeLTPUnnGY=; b=QQTEbRoIlAZ2xpPm69YYjBVoz44os13BumnBfj1p4zautHeJi+Z5revT yiKZ/XTjteP2r67Ox2VWlGEMwGDDHxB5UqGhXsXeszbTIYYm91ErPZuLS S9L/J+uiS9T6dcD35ScpjmuXGnSCRv9/w0Jqcg5eJcIq6YYONwL1b02dn Q7+SHVQJUYn/3ExHOTk8lJ/0kHZYtVxcWGhqby3xHNd1gmOb5QdwjknLs BcXThzgs4H9mWibGx99+ofYbyrFo0mHjFWa7qNn0lYC/nhMUlOwGE26Ib 6nlBqBWyL5zKcFz3OHdUxtkeJ6TZc73ivzUlwlp0hqnEZhwSONUyssxLs A==; X-IronPort-AV: E=Sophos;i="5.90,236,1643698800"; d="scan'208";a="151544594" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 05 Apr 2022 04:25:31 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 5 Apr 2022 04:25:29 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 5 Apr 2022 04:25:27 -0700 From: Claudiu Beznea To: , , , , CC: , , , , Claudiu Beznea Subject: [PATCH 3/8] dt-bindings: reset: atmel, at91sam9260-reset: add sama7g5 bindings Date: Tue, 5 Apr 2022 14:27:19 +0300 Message-ID: <20220405112724.2760905-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220405112724.2760905-1-claudiu.beznea@microchip.com> References: <20220405112724.2760905-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220405_042534_765226_26B755A2 X-CRM114-Status: UNSURE ( 9.74 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add documentation for SAMA7G5 reset controller. Compared with previous versions of reset controllers this one contains support for resetting in SoC devices (e.g. USB PHYs). Signed-off-by: Claudiu Beznea Reviewed-by: Rob Herring --- .../reset/atmel,at91sam9260-reset.yaml | 23 +++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml index 92936c987c9a..a165c10ae474 100644 --- a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml +++ b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml @@ -10,7 +10,8 @@ maintainers: - Claudiu Beznea description: | - The system reset controller can be used to reset the CPU. + The system reset controller can be used to reset the CPU. In case of + SAMA7G5 it can also reset some devices (e.g. USB PHYs). properties: compatible: @@ -21,21 +22,39 @@ properties: - atmel,at91sam9g45-rstc - atmel,sama5d3-rstc - microchip,sam9x60-rstc + - microchip,sama7g5-rstc - items: - const: atmel,sama5d3-rstc - const: atmel,at91sam9g45-rstc reg: - maxItems: 1 + minItems: 1 + items: + - description: base registers for system reset control + - description: registers for device specific reset control clocks: maxItems: 1 + "#reset-cells": + const: 1 + required: - compatible - reg - clocks +allOf: + - if: + properties: + compatible: + contains: + enum: + - microchip,sama7g5-rstc + then: + required: + - "#reset-cells" + additionalProperties: false examples: