From patchwork Fri Apr 8 20:03:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kalesh Singh X-Patchwork-Id: 12807167 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6816AC433F5 for ; Fri, 8 Apr 2022 20:05:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:From:Subject:References:Mime-Version :Message-Id:In-Reply-To:Date:Reply-To:To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bmTa8mxIevoadl1GUoxcqxTisJ4k/SpMvyKFJzLjx74=; b=cZGwTDFQs7vAMS y5J3LoffD28PgsnHH4LTegI84D1zH/ohbVkGqJU81RdfQ29JAPeWl8qwUKABFSnx+OdoCM49k694u GWf28sVDIjQLtUyK9rw8kMHXqkyME8BFyglXYN7rYSgtep/uRSKUZz4KpEGFm+269dAc5qWvH4z57 bM5Dt0LgxZgxCu0Mmrov0Tu1RZzJ4ygNKZG47OgwPI2mGLnRZwTa6WRacJVFqZiMseoBNofPYse6t qizjunXXEUIVnVtfRVHy4KWru+5uZ8A0eN4tRBI61vvpIWMueY+tIbZ1TSkKhMJY4xeRWICXkL09q QTzVvzOcEVMHYD9QezZg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncuqR-0018Fe-6b; Fri, 08 Apr 2022 20:04:35 +0000 Received: from mail-yw1-x1149.google.com ([2607:f8b0:4864:20::1149]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1ncuqN-0018EE-Hc for linux-arm-kernel@lists.infradead.org; Fri, 08 Apr 2022 20:04:33 +0000 Received: by mail-yw1-x1149.google.com with SMTP id 00721157ae682-2ebef8022c7so13756027b3.11 for ; Fri, 08 Apr 2022 13:04:27 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:cc; bh=vGOzm6wEc5ZJu/z76Pc4OmWnVkDbT1lO/lddjg12IXE=; b=rUA6y475P61rM5lqwSb9OqoqNh79eA7sv/HxbLZxdgaSlFH9dShNfu0fq5DzHE503f +3zuggND13GYxNUriO9tYaWp4UUfrjqmDXMcALqUPv7QZW3nfS3MwuUaPfx2RvM6p2ht OL0IG+mzOtgXulhQkBIIbmfuxSO7QAjjrFmiYmV19FwZbNySvX0ZvnxzD9AAycEcks/F zo61SXvyhe3SmzWLuyNcDVr310584XhMjL6tqTL8G8nBGk0dUs8w03sHvp/oRwWPqyVw bwDSMtE28u5zx9gVams/JAF3t8OvllyfgbnLAlA8vF9WrZIi7GIFC6KNAkMcOoHV5khT tziA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:cc; bh=vGOzm6wEc5ZJu/z76Pc4OmWnVkDbT1lO/lddjg12IXE=; b=qHJCXoYCb8V/YVXW6hK/G370+sKikKhYhwV9+zBs203tHoddIdHnjR1OuhLwgP1zIc RH5ghMK7MnIi1oTZSix72hf0ZyPK2gcQR9HmCmZvpQot+1Lq9xvo3IiK4wUSqs4iSwt8 7+7R1j4Edr9gRM6JETqVcsGq8wHB4BbVK2ONpfP9Mq7kxZe116524Z4TKaV1THRinj0M tKwWFnbXYbVDE4p7dxpGx5QdvTZDHPoL1AJ3OJCfGSLcBeMPnvYTSf4O39LF4Ddz8ZYy +ndnxVy2//ggRcC8NSbDx4e1rPIVvPxePwTTNtog5xxfhDIgkBzDreLnIvmhjM/taUMq tLkQ== X-Gm-Message-State: AOAM530HQRilDlKUt4SdYBRy/pyzWIzfa64ktmYKCiOO4j4mDxHIi3KA BORUcdlY56uAXi4MabrtsFeKP6tht7HAPXThkA== X-Google-Smtp-Source: ABdhPJy7bDbcYK9hv0FuHXGFrQmgggKoFAeK499e8yZjtgPh0IStbAziEvqq3t6BQ7easKktwaeWTk1bQ/5sq4tOsQ== X-Received: from kaleshsingh.mtv.corp.google.com ([2620:15c:211:200:f0ed:c8a:dab7:ecc2]) (user=kaleshsingh job=sendgmr) by 2002:a5b:246:0:b0:619:5651:3907 with SMTP id g6-20020a5b0246000000b0061956513907mr15443681ybp.190.1649448266782; Fri, 08 Apr 2022 13:04:26 -0700 (PDT) Date: Fri, 8 Apr 2022 13:03:24 -0700 In-Reply-To: <20220408200349.1529080-1-kaleshsingh@google.com> Message-Id: <20220408200349.1529080-2-kaleshsingh@google.com> Mime-Version: 1.0 References: <20220408200349.1529080-1-kaleshsingh@google.com> X-Mailer: git-send-email 2.35.1.1178.g4f1659d476-goog Subject: [PATCH v7 1/6] KVM: arm64: Introduce hyp_alloc_private_va_range() From: Kalesh Singh Cc: will@kernel.org, maz@kernel.org, qperret@google.com, tabba@google.com, surenb@google.com, kernel-team@android.com, Kalesh Singh , James Morse , Alexandru Elisei , Suzuki K Poulose , Catalin Marinas , Mark Rutland , Zenghui Yu , Masahiro Yamada , Nick Desaulniers , Changbin Du , linux-arm-kernel@lists.infradead.org, kvmarm@lists.cs.columbia.edu, linux-kernel@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220408_130431_646194_C0DEDC5F X-CRM114-Status: GOOD ( 19.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org hyp_alloc_private_va_range() can be used to reserve private VA ranges in the nVHE hypervisor. Allocations are aligned based on the order of the requested size. This will be used to implement stack guard pages for KVM nVHE hypervisor (nVHE Hyp mode / not pKVM), in a subsequent patch in the series. Signed-off-by: Kalesh Singh Tested-by: Fuad Tabba Reviewed-by: Fuad Tabba --- Changes in v7: - Add Fuad's Reviewed-by and Tested-by tags. Changes in v6: - Update kernel-doc for hyp_alloc_private_va_range() and add return description, per Stephen - Update hyp_alloc_private_va_range() to return an int error code, per Stephen - Replace IS_ERR() checks with IS_ERR_VALUE() check, per Stephen - Clean up goto, per Stephen Changes in v5: - Align private allocations based on the order of their size, per Marc Changes in v4: - Handle null ptr in hyp_alloc_private_va_range() and replace IS_ERR_OR_NULL checks in callers with IS_ERR checks, per Fuad - Fix kernel-doc comments format, per Fuad Changes in v3: - Handle null ptr in IS_ERR_OR_NULL checks, per Mark arch/arm64/include/asm/kvm_mmu.h | 1 + arch/arm64/kvm/mmu.c | 66 +++++++++++++++++++++----------- 2 files changed, 45 insertions(+), 22 deletions(-) diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h index 74735a864eee..a50cbb5ba402 100644 --- a/arch/arm64/include/asm/kvm_mmu.h +++ b/arch/arm64/include/asm/kvm_mmu.h @@ -154,6 +154,7 @@ static __always_inline unsigned long __kern_hyp_va(unsigned long v) int kvm_share_hyp(void *from, void *to); void kvm_unshare_hyp(void *from, void *to); int create_hyp_mappings(void *from, void *to, enum kvm_pgtable_prot prot); +int hyp_alloc_private_va_range(size_t size, unsigned long *haddr); int create_hyp_io_mappings(phys_addr_t phys_addr, size_t size, void __iomem **kaddr, void __iomem **haddr); diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c index 0d19259454d8..3d3efea4e991 100644 --- a/arch/arm64/kvm/mmu.c +++ b/arch/arm64/kvm/mmu.c @@ -457,23 +457,22 @@ int create_hyp_mappings(void *from, void *to, enum kvm_pgtable_prot prot) return 0; } -static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size, - unsigned long *haddr, - enum kvm_pgtable_prot prot) + +/** + * hyp_alloc_private_va_range - Allocates a private VA range. + * @size: The size of the VA range to reserve. + * @haddr: The hypervisor virtual start address of the allocation. + * + * The private virtual address (VA) range is allocated below io_map_base + * and aligned based on the order of @size. + * + * Return: 0 on success or negative error code on failure. + */ +int hyp_alloc_private_va_range(size_t size, unsigned long *haddr) { unsigned long base; int ret = 0; - if (!kvm_host_owns_hyp_mappings()) { - base = kvm_call_hyp_nvhe(__pkvm_create_private_mapping, - phys_addr, size, prot); - if (IS_ERR_OR_NULL((void *)base)) - return PTR_ERR((void *)base); - *haddr = base; - - return 0; - } - mutex_lock(&kvm_hyp_pgd_mutex); /* @@ -484,30 +483,53 @@ static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size, * * The allocated size is always a multiple of PAGE_SIZE. */ - size = PAGE_ALIGN(size + offset_in_page(phys_addr)); - base = io_map_base - size; + base = io_map_base - PAGE_ALIGN(size); + + /* Align the allocation based on the order of its size */ + base = ALIGN_DOWN(base, PAGE_SIZE << get_order(size)); /* * Verify that BIT(VA_BITS - 1) hasn't been flipped by * allocating the new area, as it would indicate we've * overflowed the idmap/IO address range. */ - if ((base ^ io_map_base) & BIT(VA_BITS - 1)) + if (!base || (base ^ io_map_base) & BIT(VA_BITS - 1)) ret = -ENOMEM; else - io_map_base = base; + *haddr = io_map_base = base; mutex_unlock(&kvm_hyp_pgd_mutex); + return ret; +} + +static int __create_hyp_private_mapping(phys_addr_t phys_addr, size_t size, + unsigned long *haddr, + enum kvm_pgtable_prot prot) +{ + unsigned long addr; + int ret = 0; + + if (!kvm_host_owns_hyp_mappings()) { + addr = kvm_call_hyp_nvhe(__pkvm_create_private_mapping, + phys_addr, size, prot); + if (IS_ERR_VALUE(addr)) + return addr; + *haddr = addr; + + return 0; + } + + size += offset_in_page(phys_addr); + ret = hyp_alloc_private_va_range(size, &addr); if (ret) - goto out; + return ret; - ret = __create_hyp_mappings(base, size, phys_addr, prot); + ret = __create_hyp_mappings(addr, size, phys_addr, prot); if (ret) - goto out; + return ret; - *haddr = base + offset_in_page(phys_addr); -out: + *haddr = addr + offset_in_page(phys_addr); return ret; }