From patchwork Tue Apr 19 06:55:16 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Reiji Watanabe X-Patchwork-Id: 12817500 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id BA14EC433EF for ; Tue, 19 Apr 2022 07:02:33 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:References: Mime-Version:Message-Id:In-Reply-To:Date:Reply-To:Content-ID: Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc :Resent-Message-ID:List-Owner; bh=Jf3/5SJbzgUNVL3/F24DFMBR89Q1JspDe0B4Sxkgu8E=; b=PNdVji5QPOFGWV+U3w1G+SnkLW TDCDfEJ/SS/OVWrxsR0gNO8SPzCxMErA1PgaEefVTsgFz6MBg56Zl8mVdfoztnsXtE5H4kF0YXVQ9 Udxf9ASZopuPW2BaiDTJneMJCzFafBCuxe+K4OmT3WdRbSca4UF0PZ9eKQ2nFemCgG83o8685172w lPT/hwquKkWj3gUhCRBxMnB727yS+lu0OTU5a9VtohA0KTpDdwLVGXze4qnNadIaC9EqcRuNi7COx jeCWKaYe1/CDftkDBGEZV1M+dzLIuzN3bUa4taX1y8gKGHxc71HqM+XJHbOQjzeRbgy0f7gQcNE62 18PROBeg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nghrK-001p3O-Qn; Tue, 19 Apr 2022 07:01:11 +0000 Received: from mail-pl1-x649.google.com ([2607:f8b0:4864:20::649]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nghnf-001nRn-Dz for linux-arm-kernel@lists.infradead.org; Tue, 19 Apr 2022 06:57:25 +0000 Received: by mail-pl1-x649.google.com with SMTP id f11-20020a170902684b00b00158c67ef30cso6679257pln.7 for ; Mon, 18 Apr 2022 23:57:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:in-reply-to:message-id:mime-version:references:subject:from:to :cc; bh=4TCi+sJLW2uaem/+k27V6Nf+rQ0PhWYVioo5Q6rkdZk=; b=Hp9HgO/5PopUEK+kzy6sJa4PypL+kqEMbC0oXyjEuGS+tzp+ZuEBJ5KSrhSO+ILmk6 y3AOpc1wZCpj2wIc6+I+hBwQ3UH842aJJThkW8WOBRZKQFE/jmRiW7GBjnOgjPi0I/Ja AlRFrV3q/j3YxsH9BMEAwDaIr+amb8gc2m4D1tyjC5WJMoZXm451ThezOj25kGVusGj8 Ae2esA2cfwtvUAbyGmHBoQZ+mflUw46F4D9BrYFkYw9TPctz5VQJDQXghVxFQhXKEmcT vYiIHlopdqiMQCAx/nKa/mhAkBI+zDzW7XuUWrAOvDuoE3jerlVF3x+P9zxP8OTvDRxi cLIQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:in-reply-to:message-id:mime-version :references:subject:from:to:cc; bh=4TCi+sJLW2uaem/+k27V6Nf+rQ0PhWYVioo5Q6rkdZk=; b=pS7R1ZTP+4QhBYCF4q9NuXVsOJy1ouM0xpX6C/3Eaq9XIYD4RlvxIs7rHBQJJs3Byn Kaxq18s1inu2R6Njh7f5tRwhrHl/kFI7ZmicJMk0+nbFXDQDtWD9znD00Wr4kGdJE39b Q9TBXDuJCtu1W4krmKSMMW3noh1j5hBHi1mAMuei56Gq9w1Wkv+R29LpMvuYZBvCTn4+ nwvxJ8PX4AtIFhi6NJFth+F+3gryaeUD0OudDt05iOmgAe38FbPCFURp78kMbjN9tx73 stwLqk4mkmbzeP/Mzq6cJkLqcZOXsT7DLuCxoEKpCLL/2V6o7UYK/MuBoGZWI6etdzko bNcw== X-Gm-Message-State: AOAM531zQHkA6l636/Zy6Bn2XK2GA9JttH2IDeJ8bE2qo6yrrZag4V55 A4npDUdxK9iegeAlZ9zpN6T9e2BDqnk= X-Google-Smtp-Source: ABdhPJzSEZPodaqcIqvMD82N8W0cud+ZqgBHTt/0eiSMy13p/um5GCarQPZcMAPbrjM8K4rm6xCKlIue0Vo= X-Received: from reiji-vws-sp.c.googlers.com ([fda3:e722:ac3:cc00:7f:e700:c0a8:3d59]) (user=reijiw job=sendgmr) by 2002:a17:903:2283:b0:158:e7f4:7056 with SMTP id b3-20020a170903228300b00158e7f47056mr14258890plh.24.1650351441718; Mon, 18 Apr 2022 23:57:21 -0700 (PDT) Date: Mon, 18 Apr 2022 23:55:16 -0700 In-Reply-To: <20220419065544.3616948-1-reijiw@google.com> Message-Id: <20220419065544.3616948-11-reijiw@google.com> Mime-Version: 1.0 References: <20220419065544.3616948-1-reijiw@google.com> X-Mailer: git-send-email 2.36.0.rc0.470.gd361397f0d-goog Subject: [PATCH v7 10/38] KVM: arm64: Make ID_AA64ISAR2_EL1 writable From: Reiji Watanabe To: Marc Zyngier , kvmarm@lists.cs.columbia.edu Cc: kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, James Morse , Alexandru Elisei , Suzuki K Poulose , Paolo Bonzini , Will Deacon , Andrew Jones , Fuad Tabba , Peng Liang , Peter Shier , Ricardo Koller , Oliver Upton , Jing Zhang , Raghavendra Rao Anata , Reiji Watanabe X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220418_235723_559265_96A3734E X-CRM114-Status: GOOD ( 17.61 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org This patch adds id_reg_desc for ID_AA64ISAR2_EL1 to make it writable by userspace. Return an error if userspace tries to set PTRAUTH related fields of the register to values that conflict with PTRAUTH configuration, which was configured by KVM_ARM_VCPU_INIT, for the guest. Signed-off-by: Reiji Watanabe --- arch/arm64/kvm/sys_regs.c | 65 ++++++++++++++++++++++++++++++++++++--- 1 file changed, 60 insertions(+), 5 deletions(-) diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c index dd4dcc1e4982..ba2e6dac7774 100644 --- a/arch/arm64/kvm/sys_regs.c +++ b/arch/arm64/kvm/sys_regs.c @@ -289,6 +289,16 @@ static bool trap_raz_wi(struct kvm_vcpu *vcpu, (cpuid_feature_extract_unsigned_field(val, ID_AA64ISAR1_GPI_SHIFT) >= \ ID_AA64ISAR1_GPI_IMP_DEF) +#define ISAR2_PTRAUTH_MASK (ARM64_FEATURE_MASK(ID_AA64ISAR2_APA3) | \ + ARM64_FEATURE_MASK(ID_AA64ISAR2_GPA3)) + +#define aa64isar2_has_apa3(val) \ + (cpuid_feature_extract_unsigned_field(val, ID_AA64ISAR2_APA3_SHIFT) >= \ + ID_AA64ISAR2_APA3_ARCHITECTED) +#define aa64isar2_has_gpa3(val) \ + (cpuid_feature_extract_unsigned_field(val, ID_AA64ISAR2_GPA3_SHIFT) >= \ + ID_AA64ISAR2_GPA3_ARCHITECTED) + #define __FTR_BITS(ftr_sign, ftr_type, bit_pos, safe) { \ .sign = ftr_sign, \ .type = ftr_type, \ @@ -507,6 +517,31 @@ static int validate_id_aa64isar1_el1(struct kvm_vcpu *vcpu, return 0; } +static int validate_id_aa64isar2_el1(struct kvm_vcpu *vcpu, + const struct id_reg_desc *id_reg, u64 val) +{ + bool has_gpa3, has_apa3, lim_has_gpa3, lim_has_apa3; + u64 lim = id_reg->vcpu_limit_val; + + has_gpa3 = aa64isar2_has_gpa3(val); + has_apa3 = aa64isar2_has_apa3(val); + lim_has_gpa3 = aa64isar2_has_gpa3(lim); + lim_has_apa3 = aa64isar2_has_apa3(lim); + + /* + * Check if there is a conflict in the requested value for + * ID_AA64ISAR2_EL1 with PTRAUTH configuration. + * See comments in validate_id_aa64isar1_el1() for more detail. + */ + if (lim_has_gpa3 && (vcpu_has_ptrauth(vcpu) ^ has_gpa3)) + return -EPERM; + + if (lim_has_apa3 && (vcpu_has_ptrauth(vcpu) ^ has_apa3)) + return -EPERM; + + return 0; +} + static void init_id_aa64pfr0_el1_desc(struct id_reg_desc *id_reg) { u64 limit = id_reg->vcpu_limit_val; @@ -550,6 +585,13 @@ static void init_id_aa64isar1_el1_desc(struct id_reg_desc *id_reg) id_reg->vcpu_limit_val &= ~ISAR1_TRAUTH_MASK; } +static void init_id_aa64isar2_el1_desc(struct id_reg_desc *id_reg) +{ + if (!system_has_full_ptr_auth()) + id_reg->vcpu_limit_val &= ~ISAR2_PTRAUTH_MASK; +} + + static u64 vcpu_mask_id_aa64pfr0_el1(const struct kvm_vcpu *vcpu, const struct id_reg_desc *idr) { @@ -568,6 +610,13 @@ static u64 vcpu_mask_id_aa64isar1_el1(const struct kvm_vcpu *vcpu, return vcpu_has_ptrauth(vcpu) ? 0 : ISAR1_TRAUTH_MASK; } +static u64 vcpu_mask_id_aa64isar2_el1(const struct kvm_vcpu *vcpu, + const struct id_reg_desc *idr) +{ + return vcpu_has_ptrauth(vcpu) ? 0 : ISAR2_PTRAUTH_MASK; +} + + static int validate_id_reg(struct kvm_vcpu *vcpu, const struct id_reg_desc *id_reg, u64 val) { @@ -1544,11 +1593,6 @@ static u64 read_id_reg_with_encoding(const struct kvm_vcpu *vcpu, u32 id) val = read_kvm_id_reg(vcpu->kvm, id); switch (id) { - case SYS_ID_AA64ISAR2_EL1: - if (!vcpu_has_ptrauth(vcpu)) - val &= ~(ARM64_FEATURE_MASK(ID_AA64ISAR2_APA3) | - ARM64_FEATURE_MASK(ID_AA64ISAR2_GPA3)); - break; case SYS_ID_AA64DFR0_EL1: /* Limit debug to ARMv8.0 */ val &= ~ARM64_FEATURE_MASK(ID_AA64DFR0_DEBUGVER); @@ -3359,6 +3403,16 @@ static struct id_reg_desc id_aa64isar1_el1_desc = { }, }; +static struct id_reg_desc id_aa64isar2_el1_desc = { + .reg_desc = ID_SANITISED(ID_AA64ISAR2_EL1), + .init = init_id_aa64isar2_el1_desc, + .validate = validate_id_aa64isar2_el1, + .vcpu_mask = vcpu_mask_id_aa64isar2_el1, + .ftr_bits = { + U_FTR_BITS(FTR_EXACT, ID_AA64ISAR2_APA3_SHIFT, 0), + }, +}; + #define ID_DESC(id_reg_name, id_reg_desc) \ [IDREG_IDX(SYS_##id_reg_name)] = (id_reg_desc) @@ -3371,6 +3425,7 @@ static struct id_reg_desc *id_reg_desc_table[KVM_ARM_ID_REG_MAX_NUM] = { /* CRm=6 */ ID_DESC(ID_AA64ISAR0_EL1, &id_aa64isar0_el1_desc), ID_DESC(ID_AA64ISAR1_EL1, &id_aa64isar1_el1_desc), + ID_DESC(ID_AA64ISAR2_EL1, &id_aa64isar2_el1_desc), }; static inline struct id_reg_desc *get_id_reg_desc(u32 id)