@@ -723,6 +723,36 @@ static int validate_id_dfr0_el1(struct kvm_vcpu *vcpu,
return 0;
}
+static int validate_mvfr1_el1(struct kvm_vcpu *vcpu,
+ const struct id_reg_desc *id_reg, u64 val)
+{
+ unsigned int fphp, simdhp;
+ struct fphp_simdhp {
+ unsigned int fphp;
+ unsigned int simdhp;
+ };
+ /* Permitted fphp/simdhp value combinations according to Arm ARM */
+ struct fphp_simdhp valid_fphp_simdhp[3] = {{0, 0}, {2, 1}, {3, 2}};
+ int i;
+ bool is_valid_fphp_simdhp = false;
+
+ fphp = cpuid_feature_extract_unsigned_field(val, MVFR1_FPHP_SHIFT);
+ simdhp = cpuid_feature_extract_unsigned_field(val, MVFR1_SIMDHP_SHIFT);
+
+ for (i = 0; i < ARRAY_SIZE(valid_fphp_simdhp); i++) {
+ if (valid_fphp_simdhp[i].fphp == fphp &&
+ valid_fphp_simdhp[i].simdhp == simdhp) {
+ is_valid_fphp_simdhp = true;
+ break;
+ }
+ }
+
+ if (!is_valid_fphp_simdhp)
+ return -EINVAL;
+
+ return 0;
+}
+
static void init_id_aa64pfr0_el1_desc(struct id_reg_desc *id_reg)
{
u64 limit = id_reg->vcpu_limit_val;
@@ -4157,6 +4187,11 @@ static struct id_reg_desc id_mmfr0_el1_desc = {
},
};
+static struct id_reg_desc mvfr1_el1_desc = {
+ .reg_desc = ID_SANITISED(MVFR1_EL1),
+ .validate = validate_mvfr1_el1,
+};
+
#define ID_DESC(id_reg_name, id_reg_desc) \
[IDREG_IDX(SYS_##id_reg_name)] = (id_reg_desc)
@@ -4167,6 +4202,7 @@ static struct id_reg_desc *id_reg_desc_table[KVM_ARM_ID_REG_MAX_NUM] = {
ID_DESC(ID_MMFR0_EL1, &id_mmfr0_el1_desc),
/* CRm=3 */
+ ID_DESC(MVFR1_EL1, &mvfr1_el1_desc),
ID_DESC(ID_DFR1_EL1, &id_dfr1_el1_desc),
/* CRm=4 */
This patch adds id_reg_desc for MVFR1_EL1 to make it writable by userspace. There are only a few valid combinations of values that can be set for FPHP and SIMDHP fields according to Arm ARM. Return an error when userspace tries to set those fields to values that don't match any of the valid combinations. Signed-off-by: Reiji Watanabe <reijiw@google.com> --- arch/arm64/kvm/sys_regs.c | 36 ++++++++++++++++++++++++++++++++++++ 1 file changed, 36 insertions(+)