From patchwork Thu Apr 21 06:19:38 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vignesh Raghavendra X-Patchwork-Id: 12821122 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B3F32C433F5 for ; Thu, 21 Apr 2022 06:21:17 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=uq5O02fQlgf6xbD74KhP95npY6fGeMc4wtW/cdELLmw=; b=PEFBi3dOK6x6SS 1tp6Z+2ouQfVlI+BJP0F5RCFe9LCpJFEBsCZnNJiTjQLPm1+EEcr2oP7JOtxCUaGfkn5ydtIwYaEL qbf88XeJFW/Oxf3+41iHski10m2SNtoL1Yz+SxMqH2M/2ZJynnjgrVpuPKhPdmXFi9JL/SBPVCKTb AlWvhz6E+k9M8Ey4Qr/1y9i0pFgiAHNaByEDpIBafVZahrq71ZtvqHTuMvC0C7u0fd/FNDyX79jkG f/6XCjwOXRvuFCCGbz2CRFJ0TWN7JAhi3qS0L6uWtQFckbUzea6ddQBtYTosLnk4DUJfLqmW7+7w6 1sgW2oh2nCX7HBD6XzcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhQAm-00BgFs-FU; Thu, 21 Apr 2022 06:20:12 +0000 Received: from fllv0016.ext.ti.com ([198.47.19.142]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhQAj-00BgDR-BA for linux-arm-kernel@lists.infradead.org; Thu, 21 Apr 2022 06:20:10 +0000 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0016.ext.ti.com (8.15.2/8.15.2) with ESMTP id 23L6K1w3085688; Thu, 21 Apr 2022 01:20:01 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1650522001; bh=Zb6hy1mU9VhZmpYtG3YtsYUZK/kNtHDTPxAdvz7jqO0=; h=From:To:CC:Subject:Date; b=LQ7dQ+RqMDkm6op1V6CEhKVNIGZ/N+civS72m140my55ZOrpha7rwTf5pdRMe3IK/ oNUrPV6iW2++MfXvrfsc17wW0ZrneVN/PSFUXdjyePJGPAdMVwSXZEZHOczr+m3Qrg NdWT3ayUhKXRYMR0bf0Nb3ZsehwWnovi6kwmgyEg= Received: from DFLE105.ent.ti.com (dfle105.ent.ti.com [10.64.6.26]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 23L6K0LG128019 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 21 Apr 2022 01:20:00 -0500 Received: from DFLE115.ent.ti.com (10.64.6.36) by DFLE105.ent.ti.com (10.64.6.26) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14; Thu, 21 Apr 2022 01:20:00 -0500 Received: from fllv0040.itg.ti.com (10.64.41.20) by DFLE115.ent.ti.com (10.64.6.36) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.2308.14 via Frontend Transport; Thu, 21 Apr 2022 01:20:00 -0500 Received: from ula0132425.dhcp.ti.com (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0040.itg.ti.com (8.15.2/8.15.2) with ESMTP id 23L6JuoJ022048; Thu, 21 Apr 2022 01:19:56 -0500 From: Vignesh Raghavendra To: Nishanth Menon , Vignesh Raghavendra , Tero Kristo , Rob Herring CC: Krzysztof Kozlowski , , , , Aswath Govindraju , Grygorii Strashko Subject: [PATCH] arm64: dts: ti: k3-am62-mcu: Enable MCU GPIO module Date: Thu, 21 Apr 2022 11:49:38 +0530 Message-ID: <20220421061938.122317-1-vigneshr@ti.com> X-Mailer: git-send-email 2.36.0 MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220420_232009_618335_65E80E56 X-CRM114-Status: UNSURE ( 9.00 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org AM62 has x1 GPIO module and associated interrupt router in MCU Domain. Add DT nodes for the same. Signed-off-by: Vignesh Raghavendra Reviewed-by: Aswath Govindraju --- arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi | 28 +++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi index d103824c963f..45343381ad0b 100644 --- a/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi +++ b/arch/arm64/boot/dts/ti/k3-am62-mcu.dtsi @@ -53,4 +53,32 @@ mcu_spi1: spi@4b10000 { power-domains = <&k3_pds 148 TI_SCI_PD_EXCLUSIVE>; clocks = <&k3_clks 148 0>; }; + + mcu_gpio_intr: interrupt-controller@4210000 { + compatible = "ti,sci-intr"; + reg = <0x00 0x04210000 0x00 0x200>; + ti,intr-trigger-type = <1>; + interrupt-controller; + interrupt-parent = <&gic500>; + #interrupt-cells = <1>; + ti,sci = <&dmsc>; + ti,sci-dev-id = <5>; + ti,interrupt-ranges = <0 104 4>; + }; + + mcu_gpio0: gpio@4201000 { + compatible = "ti,am64-gpio", "ti,keystone-gpio"; + reg = <0x0 0x4201000 0x0 0x100>; + gpio-controller; + #gpio-cells = <2>; + interrupt-parent = <&mcu_gpio_intr>; + interrupts = <30>, <31>; + interrupt-controller; + #interrupt-cells = <2>; + ti,ngpio = <24>; + ti,davinci-gpio-unbanked = <0>; + power-domains = <&k3_pds 79 TI_SCI_PD_EXCLUSIVE>; + clocks = <&k3_clks 79 0>; + clock-names = "gpio"; + }; };