From patchwork Thu Apr 21 18:28:01 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamal Dasu X-Patchwork-Id: 12822209 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F229BC433F5 for ; Thu, 21 Apr 2022 18:29:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xpIcr1TYuNcn58TJc44w3f91yITM8W7ZTahxVP4WV4Y=; b=aVthsE4mZ9Tca0 jWT581mfYMueeax9GGKLg+p3Xob195acdmg6m3vmCqIwVXz/vePx1RR/hpme0scbh6msICD8vHEk1 0MMFNjyL1zge9wwR2rWFsaM3lRFDdWln4aapovpJ9wW61n/44+dOAlGmibH9Wf+ddG3V1BHLWFrzt Dv7ZDah12qtcrUV1q8FO+QcYLjZVAOMOHFSF7RdmbFjVLzsgHbCxScGbzrDyavOk1xj9CEg3SOcYO xc9DFk6+Wh3wMNj1u6xOqbpS8Mgw0mWrvHKermwYrbpG5wnxYb9WTl6k6Jkropm8ZvjwSu0ryIbyf CsFEyoQ2If7qHASkDIsg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhbXn-00EdTm-UL; Thu, 21 Apr 2022 18:28:44 +0000 Received: from mail-pj1-x102f.google.com ([2607:f8b0:4864:20::102f]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhbXd-00EdOg-Cy for linux-arm-kernel@lists.infradead.org; Thu, 21 Apr 2022 18:28:34 +0000 Received: by mail-pj1-x102f.google.com with SMTP id w5-20020a17090aaf8500b001d74c754128so1218354pjq.0 for ; Thu, 21 Apr 2022 11:28:31 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=mxxHlhYNIG4dd3FIR1DSmPfxfi0MyzRVrwtk2D5SO70=; b=RxdLGeE8XYHgxJljVAm+AWBFmD6aB+WctKzs5SaWM9HH6YMPD57YSpgi2WhuGj0DyV rYTmYoSpypPiAgLZAhv2X+engz8F0b8tJgc/ENDdxvCb1rM2oITYT/YdtirU2z4EN0Wk BTaGwTlzC1KkH3g36aJxOztz57jTwJyR67WCCuMNLuGnZ1OQJLjWbHo5bymacR+hSXL2 o+gFDfdoUetYeQVQev3rhKrOvqJAih9s79BiHHIrxnd/tRL6RPRJimpkbwxgmYhZUpx2 BYHmwy+iYPGDbF6L/cO7XpzBFO7NJzo1fEDAVWi8a8bEFmrRI9V4k3VWcfgUFc6KJtO2 NIgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=mxxHlhYNIG4dd3FIR1DSmPfxfi0MyzRVrwtk2D5SO70=; b=p020iE8w8MiqrWhPjXuaGaN1xRTUBJO/ALl5fHOQ8ccBa5HdCVD6N0pSlTI1OrwHbM SlOBDA4r4xh3+PWe10VqpBo/P4rTUfjD4nTRGWfarDvVBywhrncLucRBrXcCgWXfXhUw ASav17JuFIycQ9NACXl2F63d9Jo9i+um0bKTmz7/NCgqbrqqJsNMydV4cf/uP7NvrsvM wgPblaqitbeH6OGolxtzY0tZW45mOZEoiwYdFI/X+MaFchO40AQCRzM3L3/fpGvnA1yV 5BYBV+P3y2I0E0Xcy5poOpQeguorqJW+bF4Z3AdHb37m0pYFB+XYuJIWeLoWY/t2SCEY QWRQ== X-Gm-Message-State: AOAM533O2Cq7tp+6sXedK5hgCfMmrYYRDA2BX0m2ZJiAH250AYg5IYQP NsFazljEjmN9qQ894xa3ZEI= X-Google-Smtp-Source: ABdhPJzW3IkNZoDdc/BOxTkma8VNnnhslQRkNi+B8JWEvOJx88gT6NPVZcuQ6DRdIkxKs0aAQEhUvg== X-Received: by 2002:a17:902:7088:b0:156:1aa9:79eb with SMTP id z8-20020a170902708800b001561aa979ebmr677193plk.71.1650565710635; Thu, 21 Apr 2022 11:28:30 -0700 (PDT) Received: from mail.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id s62-20020a635e41000000b003a9eb7f65absm6509333pgb.85.2022.04.21.11.28.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Thu, 21 Apr 2022 11:28:30 -0700 (PDT) From: Kamal Dasu To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, alcooperx@gmail.com Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kamal Dasu Subject: [PATCH 3/5] mmc: sdhci-brcmstb: Enable Clock Gating to save power Date: Thu, 21 Apr 2022 14:28:01 -0400 Message-Id: <20220421182803.6495-4-kdasu.kdev@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220421182803.6495-1-kdasu.kdev@gmail.com> References: <20220421182803.6495-1-kdasu.kdev@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220421_112833_484258_248B491B X-CRM114-Status: GOOD ( 19.41 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Al Cooper Enabling this feature will allow the controller to stop the bus clock when the bus is idle. The feature is not part of the standard and is unique to newer Arasan cores and is enabled with a bit in a vendor specific register. This feature will only be enabled for non-removable devices because they don't switch the voltage and clock gating breaks SD Card volatge switching. Signed-off-by: Al Cooper Signed-off-by: Kamal Dasu Acked-by: Florian Fainelli Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-brcmstb.c | 35 +++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index f32aa045c26d..d5cb3e8978b2 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -17,11 +17,14 @@ #define SDHCI_VENDOR 0x78 #define SDHCI_VENDOR_ENHANCED_STRB 0x1 +#define SDHCI_VENDOR_GATE_SDCLK_EN 0x2 #define BRCMSTB_MATCH_FLAGS_NO_64BIT BIT(0) #define BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT BIT(1) +#define BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE BIT(2) #define BRCMSTB_PRIV_FLAGS_HAS_CQE BIT(0) +#define BRCMSTB_PRIV_FLAGS_GATE_CLOCK BIT(1) #define SDHCI_ARASAN_CQE_BASE_ADDR 0x200 @@ -36,6 +39,27 @@ struct brcmstb_match_priv { const unsigned int flags; }; +static inline void enable_clock_gating(struct sdhci_host *host) +{ + u32 reg; + + reg = sdhci_readl(host, SDHCI_VENDOR); + reg |= SDHCI_VENDOR_GATE_SDCLK_EN; + sdhci_writel(host, reg, SDHCI_VENDOR); +} + +void brcmstb_reset(struct sdhci_host *host, u8 mask) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + + sdhci_reset(host, mask); + + /* Reset will clear this, so re-enable it */ + if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK) + enable_clock_gating(host); +} + static void sdhci_brcmstb_hs400es(struct mmc_host *mmc, struct mmc_ios *ios) { struct sdhci_host *host = mmc_priv(mmc); @@ -131,7 +155,7 @@ static struct sdhci_ops sdhci_brcmstb_ops = { static struct sdhci_ops sdhci_brcmstb_ops_7216 = { .set_clock = sdhci_brcmstb_set_clock, .set_bus_width = sdhci_set_bus_width, - .reset = sdhci_reset, + .reset = brcmstb_reset, .set_uhs_signaling = sdhci_brcmstb_set_uhs_signaling, }; @@ -147,6 +171,7 @@ static struct brcmstb_match_priv match_priv_7445 = { }; static const struct brcmstb_match_priv match_priv_7216 = { + .flags = BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE, .hs400es = sdhci_brcmstb_hs400es, .ops = &sdhci_brcmstb_ops_7216, }; @@ -273,6 +298,14 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) if (res) goto err; + /* + * Automatic clock gating does not work for SD cards that may + * voltage switch so only enable it for non-removable devices. + */ + if ((match_priv->flags & BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE) && + (host->mmc->caps & MMC_CAP_NONREMOVABLE)) + priv->flags |= BRCMSTB_PRIV_FLAGS_GATE_CLOCK; + /* * If the chip has enhanced strobe and it's enabled, add * callback