| Message ID | 20220421192132.109954-1-nick.hawkins@hpe.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Introduce HPE GXP Architecture | expand |
On 21/04/2022 21:21, nick.hawkins@hpe.com wrote: > From: Nick Hawkins <nick.hawkins@hpe.com> > > The GXP is the HPE BMC SoC that is used in the majority > of HPE Generation 10 servers. Traditionally the asic will > last multiple generations of server before being replaced. > In gxp.c we reset the EHCI controller early to boot the asic. > > Info about SoC: Half of your patches did not make it to the lists. For example linux-arm-kernel has only 1, 2 and 10. Where is the rest? All your patches must be sent to linux-arm-kernel and linux-kernel. Unless the list of people To/Cc is too big (~ 10 people), entire patchset should be send to same addresses. Best regards, Krzysztof
-----Original Message----- From: Krzysztof Kozlowski [mailto:krzysztof.kozlowski@linaro.org] Sent: Saturday, April 23, 2022 6:05 AM To: Hawkins, Nick <nick.hawkins@hpe.com>; Verdun, Jean-Marie <verdun@hpe.com>; joel@jms.id.au; arnd@arndb.de; openbmc@lists.ozlabs.org Cc: Russell King <linux@armlinux.org.uk>; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 01/11] aach: arm: mach-hpe: Introduce the HPE GXP architecture On 21/04/2022 21:21, nick.hawkins@hpe.com wrote: > > From: Nick Hawkins <nick.hawkins@hpe.com> > > > > The GXP is the HPE BMC SoC that is used in the majority of HPE > > Generation 10 servers. Traditionally the asic will last multiple > > generations of server before being replaced. > > In gxp.c we reset the EHCI controller early to boot the asic. > > > > Info about SoC: > Half of your patches did not make it to the lists. For example linux-arm-kernel has only 1, 2 and 10. > Where is the rest? All your patches must be sent to linux-arm-kernel and linux-kernel. Unless the list of people To/Cc is too big (~ 10 people), entire patchset should be send to same addresses. Apologies, I was relying on the ".scripts/get_maintainer.pl" in a script to grab and send emails. I will ensure on the next patchset that linux-arm-kernel and linux-kernel are included in all of the emails. Thanks for the feedback, -Nick Hawkins
Dear Nick, Thank you for the patches. Am 21.04.22 um 21:21 schrieb nick.hawkins@hpe.com: > From: Nick Hawkins <nick.hawkins@hpe.com> Type in the prefix: s/aach/arch/. Looking at `git log --oneline arch/arm`, *ARM* or *arm* seems to be commonly used though. > The GXP is the HPE BMC SoC that is used in the majority > of HPE Generation 10 servers. Traditionally the asic will > last multiple generations of server before being replaced. Please mention what kind of documentation (datasheets, …) are available. > In gxp.c we reset the EHCI controller early to boot the asic. Why does the EHCI controller need to be reset? > Info about SoC: > > HPE GXP is the name of the HPE Soc. This SoC is used to implement > many BMC features at HPE. It supports ARMv7 architecture based on > the Cortex A9 core. It is capable of using an AXI bus to which > a memory controller is attached. It has multiple SPI interfaces > to connect boot flash and BIOS flash. It uses a 10/100/1000 MAC > for network connectivity. It has multiple i2c engines to drive > connectivity with a host infrastructure. The initial patches > enable the watchdog and timer enabling the host to be able to > boot. Maybe doe that in separate commits? Please reflow the commit message for 75 characters per line. > Signed-off-by: Nick Hawkins <nick.hawkins@hpe.com> > > --- > v5: > * Fixed version log > v4: > * Removed unecessary code: restart, iomap, init_machine unnecessary > * Reordered Kconfig depends > * Removed SPARSE_IRQ, MULTI_IRQ_HANDLER, IRQ_DOMAIN, PINCTL from > Kconfig > v3: > * Put into proper patchset format > v2: > * No change > --- > arch/arm/Kconfig | 2 ++ > arch/arm/Makefile | 1 + > arch/arm/mach-hpe/Kconfig | 17 +++++++++++++++++ > arch/arm/mach-hpe/Makefile | 1 + > arch/arm/mach-hpe/gxp.c | 16 ++++++++++++++++ > 5 files changed, 37 insertions(+) > create mode 100644 arch/arm/mach-hpe/Kconfig > create mode 100644 arch/arm/mach-hpe/Makefile > create mode 100644 arch/arm/mach-hpe/gxp.c > > diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig > index 2e8091e2d8a8..13f77eec7c40 100644 > --- a/arch/arm/Kconfig > +++ b/arch/arm/Kconfig > @@ -620,6 +620,8 @@ source "arch/arm/mach-highbank/Kconfig" > > source "arch/arm/mach-hisi/Kconfig" > > +source "arch/arm/mach-hpe/Kconfig" > + > source "arch/arm/mach-imx/Kconfig" > > source "arch/arm/mach-integrator/Kconfig" > diff --git a/arch/arm/Makefile b/arch/arm/Makefile > index a2391b8de5a5..97a89023c10f 100644 > --- a/arch/arm/Makefile > +++ b/arch/arm/Makefile > @@ -179,6 +179,7 @@ machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge > machine-$(CONFIG_ARCH_GEMINI) += gemini > machine-$(CONFIG_ARCH_HIGHBANK) += highbank > machine-$(CONFIG_ARCH_HISI) += hisi > +machine-$(CONFIG_ARCH_HPE) += hpe > machine-$(CONFIG_ARCH_INTEGRATOR) += integrator > machine-$(CONFIG_ARCH_IOP32X) += iop32x > machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx > diff --git a/arch/arm/mach-hpe/Kconfig b/arch/arm/mach-hpe/Kconfig > new file mode 100644 > index 000000000000..c075248b259e > --- /dev/null > +++ b/arch/arm/mach-hpe/Kconfig > @@ -0,0 +1,17 @@ > +menuconfig ARCH_HPE > + bool "HPE SoC support" > + depends on ARCH_MULTI_V7 > + help > + This enables support for HPE ARM based SoC chips Add a dot/period at the end? > +if ARCH_HPE > + > +config ARCH_HPE_GXP > + bool "HPE GXP SoC" > + depends on ARCH_MULTI_V7 > + select ARM_VIC > + select GENERIC_IRQ_CHIP > + select CLKSRC_MMIO > + help > + Support for GXP SoCs Please elaborate here, maybe copying parts of the commit message, in what servers it is used. > + > +endif > diff --git a/arch/arm/mach-hpe/Makefile b/arch/arm/mach-hpe/Makefile > new file mode 100644 > index 000000000000..8b0a91234df4 > --- /dev/null > +++ b/arch/arm/mach-hpe/Makefile > @@ -0,0 +1 @@ > +obj-$(CONFIG_ARCH_HPE_GXP) += gxp.o > diff --git a/arch/arm/mach-hpe/gxp.c b/arch/arm/mach-hpe/gxp.c > new file mode 100644 > index 000000000000..e2f0c3ae6bd8 > --- /dev/null > +++ b/arch/arm/mach-hpe/gxp.c > @@ -0,0 +1,16 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P.*/ Space before closing comment delimiter. > + > +#include <linux/of_platform.h> > +#include <asm/mach/arch.h> > + > +static const char * const gxp_board_dt_compat[] = { > + "hpe,gxp", > + NULL, > +}; > + > +DT_MACHINE_START(GXP_DT, "HPE GXP") > + .dt_compat = gxp_board_dt_compat, > + .l2c_aux_val = 0, > + .l2c_aux_mask = 0, > +MACHINE_END Where is the EHCI controller reset? Kind regards, Paul
-----Original Message----- From: Paul Menzel [mailto:pmenzel@molgen.mpg.de] Sent: Tuesday, April 26, 2022 3:26 AM To: Hawkins, Nick <nick.hawkins@hpe.com> Cc: Verdun, Jean-Marie <verdun@hpe.com>; joel@jms.id.au; arnd@arndb.de; openbmc@lists.ozlabs.org; Russell King <linux@armlinux.org.uk>; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 01/11] aach: arm: mach-hpe: Introduce the HPE GXP architecture > Type in the prefix: s/aach/arch/. Looking at `git log --oneline arch/arm`, *ARM* or *arm* seems to be commonly used though. I will correct this, I will also look in all other patches to make sure appropriate titles are being used. > > The GXP is the HPE BMC SoC that is used in the majority of HPE > > Generation 10 servers. Traditionally the asic will last multiple > > generations of server before being replaced. > Please mention what kind of documentation (datasheets, …) are available. Currently there are none available. The only reference I can provide will be arm documentation. > > In gxp.c we reset the EHCI controller early to boot the asic. > Why does the EHCI controller need to be reset? This functionality was moved into the boot loader. This message is stale and needs to be removed. It was necessary for the chip to boot. > > Info about SoC: > > > > HPE GXP is the name of the HPE Soc. This SoC is used to implement many > > BMC features at HPE. It supports ARMv7 architecture based on the > > Cortex A9 core. It is capable of using an AXI bus to which a memory > > controller is attached. It has multiple SPI interfaces to connect boot > > flash and BIOS flash. It uses a 10/100/1000 MAC for network > > connectivity. It has multiple i2c engines to drive connectivity with a > > host infrastructure. The initial patches enable the watchdog and timer > > enabling the host to be able to boot. > Maybe doe that in separate commits? Are you asking for me to have this paragraph in the other commits? Or perhaps not mention the other patches in this paragraph? > Please reflow the commit message for 75 characters per line. I will verify all the lines are under 75 characters. Thanks for the feedback, -Nick Hawkins
Dear Nick, Am 26.04.22 um 19:28 schrieb Hawkins, Nick: > > > -----Original Message----- > From: Paul Menzel [mailto:pmenzel@molgen.mpg.de] > Sent: Tuesday, April 26, 2022 3:26 AM > To: Hawkins, Nick <nick.hawkins@hpe.com> > Cc: Verdun, Jean-Marie <verdun@hpe.com>; joel@jms.id.au; arnd@arndb.de; openbmc@lists.ozlabs.org; Russell King <linux@armlinux.org.uk>; linux-arm-kernel@lists.infradead.org; linux-kernel@vger.kernel.org > Subject: Re: [PATCH v5 01/11] aach: arm: mach-hpe: Introduce the HPE GXP architecture [OT: Maybe use an email program, that does not add an unnecessary header.] […] >>> The GXP is the HPE BMC SoC that is used in the majority of HPE >>> Generation 10 servers. Traditionally the asic will last multiple >>> generations of server before being replaced. > >> Please mention what kind of documentation (datasheets, …) are available. > > Currently there are none available. The only reference I can provide > will be arm documentation. Too bad. >>> In gxp.c we reset the EHCI controller early to boot the asic. > >> Why does the EHCI controller need to be reset? > This functionality was moved into the boot loader. This message is > stale and needs to be removed. It was necessary for the chip to > boot. Understood. Please mention somewhere, what bootloader is used. >>> Info about SoC: >>> >>> HPE GXP is the name of the HPE Soc. This SoC is used to implement many >>> BMC features at HPE. It supports ARMv7 architecture based on the >>> Cortex A9 core. It is capable of using an AXI bus to which a memory >>> controller is attached. It has multiple SPI interfaces to connect boot >>> flash and BIOS flash. It uses a 10/100/1000 MAC for network >>> connectivity. It has multiple i2c engines to drive connectivity with a >>> host infrastructure. The initial patches enable the watchdog and timer >>> enabling the host to be able to boot. > >> Maybe doe that in separate commits? > Are you asking for me to have this paragraph in the other commits? > Or perhaps not mention the other patches in this paragraph? Yes, please move: > The initial patches enable the watchdog and timer enabling the host > to be able to boot. in a cover letter for example. >> Please reflow the commit message for 75 characters per line. > I will verify all the lines are under 75 characters. Please make sure the lines are as long as possible, while being at most 75 characters long. Kind regards, Paul
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 2e8091e2d8a8..13f77eec7c40 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -620,6 +620,8 @@ source "arch/arm/mach-highbank/Kconfig" source "arch/arm/mach-hisi/Kconfig" +source "arch/arm/mach-hpe/Kconfig" + source "arch/arm/mach-imx/Kconfig" source "arch/arm/mach-integrator/Kconfig" diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a2391b8de5a5..97a89023c10f 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile @@ -179,6 +179,7 @@ machine-$(CONFIG_ARCH_FOOTBRIDGE) += footbridge machine-$(CONFIG_ARCH_GEMINI) += gemini machine-$(CONFIG_ARCH_HIGHBANK) += highbank machine-$(CONFIG_ARCH_HISI) += hisi +machine-$(CONFIG_ARCH_HPE) += hpe machine-$(CONFIG_ARCH_INTEGRATOR) += integrator machine-$(CONFIG_ARCH_IOP32X) += iop32x machine-$(CONFIG_ARCH_IXP4XX) += ixp4xx diff --git a/arch/arm/mach-hpe/Kconfig b/arch/arm/mach-hpe/Kconfig new file mode 100644 index 000000000000..c075248b259e --- /dev/null +++ b/arch/arm/mach-hpe/Kconfig @@ -0,0 +1,17 @@ +menuconfig ARCH_HPE + bool "HPE SoC support" + depends on ARCH_MULTI_V7 + help + This enables support for HPE ARM based SoC chips +if ARCH_HPE + +config ARCH_HPE_GXP + bool "HPE GXP SoC" + depends on ARCH_MULTI_V7 + select ARM_VIC + select GENERIC_IRQ_CHIP + select CLKSRC_MMIO + help + Support for GXP SoCs + +endif diff --git a/arch/arm/mach-hpe/Makefile b/arch/arm/mach-hpe/Makefile new file mode 100644 index 000000000000..8b0a91234df4 --- /dev/null +++ b/arch/arm/mach-hpe/Makefile @@ -0,0 +1 @@ +obj-$(CONFIG_ARCH_HPE_GXP) += gxp.o diff --git a/arch/arm/mach-hpe/gxp.c b/arch/arm/mach-hpe/gxp.c new file mode 100644 index 000000000000..e2f0c3ae6bd8 --- /dev/null +++ b/arch/arm/mach-hpe/gxp.c @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) 2022 Hewlett-Packard Enterprise Development Company, L.P.*/ + +#include <linux/of_platform.h> +#include <asm/mach/arch.h> + +static const char * const gxp_board_dt_compat[] = { + "hpe,gxp", + NULL, +}; + +DT_MACHINE_START(GXP_DT, "HPE GXP") + .dt_compat = gxp_board_dt_compat, + .l2c_aux_val = 0, + .l2c_aux_mask = 0, +MACHINE_END