From patchwork Fri Apr 22 20:29:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Collingbourne X-Patchwork-Id: 12824073 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A151DC433F5 for ; Fri, 22 Apr 2022 20:30:30 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:Cc:To:From:Subject:Mime-Version: Message-Id:Date:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To: References:List-Owner; bh=Oa4Z8ZshFVFSFqLkFiMG2kifWjlOXCJPWdp22QrG0/4=; b=XbX xXE6UnfHnReYvD/Aw17usa5l0j1jyW8CC6Ny2sINFKAA1YwegOlhh9un/VHM9PiFlPARhXsP4muCa IQ0zwYVCdMLQj+cGuzivO+itgWuWhfUwhA7ViuRdDcC2H0Gy4M4/X2sDz7/A8Ns53QuGFLKOagWsG wTwBkDeRdlY5KuBqTcuZq/os0aA6VFI7UjdFb6D/eOXWYpHHSZNxZDTM6vEw0uKj0x6lihF6Cbvzj SASK9esI0CHf6a2fd75xeqo181PmZS5L2s7sIVjoK1HFTmIthZJWXj8xFTehXG4UZ3DylFkF/s2aJ 3KOaMB89Y8pAM3WUa78pxOCO+N/cF6Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhzuB-002F3k-1w; Fri, 22 Apr 2022 20:29:27 +0000 Received: from mail-yw1-x114a.google.com ([2607:f8b0:4864:20::114a]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nhzu8-002F2f-9Q for linux-arm-kernel@lists.infradead.org; Fri, 22 Apr 2022 20:29:25 +0000 Received: by mail-yw1-x114a.google.com with SMTP id 00721157ae682-2eb2bc9018aso80367867b3.18 for ; Fri, 22 Apr 2022 13:29:20 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=20210112; h=date:message-id:mime-version:subject:from:to:cc; bh=Rtw47IYRlPBnpU7mknX4u/YqYH0e3bVGo7t2WYy8DXA=; b=Sb8Kz3K/t58l2JJzi+B4Lxo3XiHnuU1E74WGivYnOxRnOb22ZJnVhE2cIqtKjxm82R /GikiT9ZntuvuCFqPZb/qxZheCcHD8F3984xKEVo3Sul3rCBVo0uMshADr+WxwvDmVT5 IEpTMZou0wq4s+xzl1lS9fjtCr4Pi6ZsR9C1lLPrpNakzZm4JWqBIAoI2Nd3WDS7tWMe 45t6/flhGub6WoQX1GCHGedCSfjBH36HLdOHKArUAQpMxVAlvNq73Bytx0D1IxfIf6Lw QQnftDMBxvVKxAsxABLX/hh44x5TPJYy3YoVF8TGxRqZvps4d5NLVcOm8jeMHc3q9GEy zhXQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:date:message-id:mime-version:subject:from:to:cc; bh=Rtw47IYRlPBnpU7mknX4u/YqYH0e3bVGo7t2WYy8DXA=; b=GabgH1fYlI+AfdseRJVeVqaZ+R+p8Uruu9qqI/EIrifNI+qIxnqcBz/vEW1o3RYXC3 D6HLL1MCHcVU/hg95c2KeeQKtdbCY8liqeSnQI58r52AYo1FPqfvCjPMbT07a09MtEkv zgwAD5Es2JvCnnk5TunRnfhhDFY1LzVczsBSsa2iVfOloxjFqMKJ1sfR6RInF/3fd1fC O/t54D+qgIumoYHmRs+cNt3QbvCP+POtoUsyDrO0AhDFfmG9IZocuHr3Z4RNxz3loJey Jp/vWxn+1tRSlBZPqP6daqoodQDX4TTjgUuV8vtztSK7hg5h+4AeGYH1Ypkzx4cQg6M5 DM2w== X-Gm-Message-State: AOAM530nIUBkdoM+pzg9/Ht5Uu4lguOXiosz5wEHncPlQ6YhWdvWGXJu 7J1DOb1IqCFKw8Pe1/LpdT02nQE= X-Google-Smtp-Source: ABdhPJwlSBRysV28yvlV36P0v0XqtGzJPs/Tc1k0sOxUu8wSpi6y4pyJeaZ37iwjbSQKdIuoGqf4+HM= X-Received: from pcc-desktop.svl.corp.google.com ([2620:15c:2ce:200:b874:60b4:62b:9c7a]) (user=pcc job=sendgmr) by 2002:a25:b8c5:0:b0:645:77c5:f35b with SMTP id g5-20020a25b8c5000000b0064577c5f35bmr6507595ybm.11.1650659360111; Fri, 22 Apr 2022 13:29:20 -0700 (PDT) Date: Fri, 22 Apr 2022 13:29:12 -0700 Message-Id: <20220422202912.292039-1-pcc@google.com> Mime-Version: 1.0 X-Mailer: git-send-email 2.36.0.rc2.479.g8af0fa9b8e-goog Subject: [PATCH v2] arm64: document the boot requirements for MTE From: Peter Collingbourne To: Catalin Marinas , Will Deacon , Jonathan Corbet , Mark Brown Cc: Peter Collingbourne , linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220422_132924_365663_5FB2DFF7 X-CRM114-Status: GOOD ( 12.59 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org When booting the kernel we access system registers such as GCR_EL1 if MTE is supported. These accesses are defined to trap to EL3 if SCR_EL3.ATA is disabled. Furthermore, tag accesses will not behave as expected if SCR_EL3.ATA is not set, or if HCR_EL2.ATA is not set and we were booted at EL1. Therefore, require that these bits are enabled when appropriate. Signed-off-by: Peter Collingbourne Reviewed-by: Mark Brown Link: https://linux-review.googlesource.com/id/Iadcfd4dcd9ba3279b2813970b44d7485b0116709 --- v2: - only required with FEAT_MTE2 Documentation/arm64/booting.rst | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/Documentation/arm64/booting.rst b/Documentation/arm64/booting.rst index 29884b261aa9..8aefa1001ae5 100644 --- a/Documentation/arm64/booting.rst +++ b/Documentation/arm64/booting.rst @@ -350,6 +350,16 @@ Before jumping into the kernel, the following conditions must be met: - SMCR_EL2.FA64 (bit 31) must be initialised to 0b1. + For CPUs with the Memory Tagging Extension feature (FEAT_MTE2): + + - If EL3 is present: + + - SCR_EL3.ATA (bit 26) must be initialised to 0b1. + + - If the kernel is entered at EL1 and EL2 is present: + + - HCR_EL2.ATA (bit 56) must be initialised to 0b1. + The requirements described above for CPU mode, caches, MMUs, architected timers, coherency and system registers apply to all CPUs. All CPUs must enter the kernel in the same exception level. Where the values documented