@@ -74,7 +74,7 @@ static void adsp_disable_all_clock(struct snd_sof_dev *sdev)
clk_disable_unprepare(priv->clk[CLK_TOP_AUDIODSP]);
}
-int adsp_clock_on(struct snd_sof_dev *sdev)
+int mt8186_adsp_clock_on(struct snd_sof_dev *sdev)
{
struct device *dev = sdev->dev;
int ret;
@@ -92,7 +92,7 @@ int adsp_clock_on(struct snd_sof_dev *sdev)
return 0;
}
-void adsp_clock_off(struct snd_sof_dev *sdev)
+void mt8186_adsp_clock_off(struct snd_sof_dev *sdev)
{
snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_CK_EN, 0);
snd_sof_dsp_write(sdev, DSP_REG_BAR, ADSP_UART_CTRL, 0);
@@ -19,6 +19,6 @@ enum adsp_clk_id {
};
int mt8186_adsp_init_clock(struct snd_sof_dev *sdev);
-int adsp_clock_on(struct snd_sof_dev *sdev);
-void adsp_clock_off(struct snd_sof_dev *sdev);
+int mt8186_adsp_clock_on(struct snd_sof_dev *sdev);
+void mt8186_adsp_clock_off(struct snd_sof_dev *sdev);
#endif
@@ -11,7 +11,7 @@
#include "mt8186.h"
#include "../../ops.h"
-void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
+void mt8186_sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
{
/* set RUNSTALL to stop core */
snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG,
@@ -39,7 +39,7 @@ void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr)
RUNSTALL, 0);
}
-void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev)
+void mt8186_sof_hifixdsp_shutdown(struct snd_sof_dev *sdev)
{
/* set RUNSTALL to stop core */
snd_sof_dsp_update_bits(sdev, DSP_REG_BAR, ADSP_HIFI_IO_CONFIG,
@@ -211,7 +211,7 @@ static int mt8186_run(struct snd_sof_dev *sdev)
adsp_bootup_addr = SRAM_PHYS_BASE_FROM_DSP_VIEW;
dev_dbg(sdev->dev, "HIFIxDSP boot from base : 0x%08X\n", adsp_bootup_addr);
- sof_hifixdsp_boot_sequence(sdev, adsp_bootup_addr);
+ mt8186_sof_hifixdsp_boot_sequence(sdev, adsp_bootup_addr);
return 0;
}
@@ -284,9 +284,9 @@ static int mt8186_dsp_probe(struct snd_sof_dev *sdev)
return ret;
}
- ret = adsp_clock_on(sdev);
+ ret = mt8186_adsp_clock_on(sdev);
if (ret) {
- dev_err(sdev->dev, "adsp_clock_on fail!\n");
+ dev_err(sdev->dev, "mt8186_adsp_clock_on fail!\n");
return ret;
}
@@ -297,18 +297,18 @@ static int mt8186_dsp_probe(struct snd_sof_dev *sdev)
static int mt8186_dsp_remove(struct snd_sof_dev *sdev)
{
- sof_hifixdsp_shutdown(sdev);
+ mt8186_sof_hifixdsp_shutdown(sdev);
adsp_sram_power_off(sdev);
- adsp_clock_off(sdev);
+ mt8186_adsp_clock_off(sdev);
return 0;
}
static int mt8186_dsp_suspend(struct snd_sof_dev *sdev, u32 target_state)
{
- sof_hifixdsp_shutdown(sdev);
+ mt8186_sof_hifixdsp_shutdown(sdev);
adsp_sram_power_off(sdev);
- adsp_clock_off(sdev);
+ mt8186_adsp_clock_off(sdev);
return 0;
}
@@ -317,9 +317,9 @@ static int mt8186_dsp_resume(struct snd_sof_dev *sdev)
{
int ret;
- ret = adsp_clock_on(sdev);
+ ret = mt8186_adsp_clock_on(sdev);
if (ret) {
- dev_err(sdev->dev, "adsp_clock_on fail!\n");
+ dev_err(sdev->dev, "mt8186_adsp_clock_on fail!\n");
return ret;
}
@@ -75,6 +75,6 @@ struct snd_sof_dev;
#define SIZE_SHARED_DRAM_UL 0x40000 /*Shared buffer for Uplink*/
#define TOTAL_SIZE_SHARED_DRAM_FROM_TAIL (SIZE_SHARED_DRAM_DL + SIZE_SHARED_DRAM_UL)
-void sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr);
-void sof_hifixdsp_shutdown(struct snd_sof_dev *sdev);
+void mt8186_sof_hifixdsp_boot_sequence(struct snd_sof_dev *sdev, u32 boot_addr);
+void mt8186_sof_hifixdsp_shutdown(struct snd_sof_dev *sdev);
#endif
ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o:(.opd+0x18): multiple definition of `adsp_clock_on'; sound/soc/sof/mediatek/mt8195/mt8195-clk.o:(.opd+0x60): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o: in function `.adsp_clock_on': ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o:(.opd+0x30): multiple definition of `adsp_clock_off'; sound/soc/sof/mediatek/mt8195/mt8195-clk.o:(.opd+0x78): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-clk.o: in function `.adsp_clock_off': ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o:(.opd+0x0): multiple definition of `sof_hifixdsp_boot_sequence'; sound/soc/sof/mediatek/mt8195/mt8195-loader.o:(.opd+0x0): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o: in function `.sof_hifixdsp_boot_sequence': ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o:(.opd+0x18): multiple definition of `sof_hifixdsp_shutdown'; sound/soc/sof/mediatek/mt8195/mt8195-loader.o:(.opd+0x18): first defined here ld: sound/soc/sof/mediatek/mt8186/mt8186-loader.o: in function `.sof_hifixdsp_shutdown': Fixes: 91316c3dbe48 ("ASoC: SOF: mediatek: Add mt8186 sof fw loader and dsp ops") Fixes: 83e1b65ad2ac ("ASoC: SOF: mediatek: Add mt8186 dsp clock support") Signed-off-by: Tinghan Shen <tinghan.shen@mediatek.com> --- sound/soc/sof/mediatek/mt8186/mt8186-clk.c | 4 ++-- sound/soc/sof/mediatek/mt8186/mt8186-clk.h | 4 ++-- sound/soc/sof/mediatek/mt8186/mt8186-loader.c | 4 ++-- sound/soc/sof/mediatek/mt8186/mt8186.c | 18 +++++++++--------- sound/soc/sof/mediatek/mt8186/mt8186.h | 4 ++-- 5 files changed, 17 insertions(+), 17 deletions(-)