From patchwork Wed Apr 27 18:08:51 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamal Dasu X-Patchwork-Id: 12829307 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9A093C433EF for ; Wed, 27 Apr 2022 18:11:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=BGX+GyPti62IB8jKGFxrU1MPBhCvUE3M/dxokq73GnU=; b=sCTXacbe1H/p1A dh9UJUnmrl89EafOo+v42OGRfdEqoAum8+i7BL7o+21FhAwMEHyfPvK2YmwQf2uSBbvsl067zMlul HVDnptyEn6V+lLGOtZhe43ctvDQlsOPIqovXn5a6/R8rt002k6Jrjic/meLvE+0ATaCF5LVPXK9Ez ZWcdTScKtqO8hN6y966OZTEFJVeHSpSydXmpIErw7eRREU5OBGZTA+0S5aWfxVzTL88P0j8dQJYfl 1agtDmA276OunxMWKE07nOyAEdqFkYul5u6UUSHqku4FXMUw5ef0Kkkjhjm2J/ldFAgdXrirAAIQ0 rMweffvQUYyscR/VUAWg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1njm7E-002trw-Uh; Wed, 27 Apr 2022 18:10:17 +0000 Received: from mail-pg1-x536.google.com ([2607:f8b0:4864:20::536]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1njm6g-002tck-4T for linux-arm-kernel@lists.infradead.org; Wed, 27 Apr 2022 18:09:43 +0000 Received: by mail-pg1-x536.google.com with SMTP id q12so2034123pgj.13 for ; Wed, 27 Apr 2022 11:09:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=Kh0Z24nrRo8CulmjggTjYpsy8ADRv1RHCAkzggFzOqo=; b=YO+hX3FejKiIUcQuPKn3jM/NlPS0bWPcFDmA0FyymXXFEDz5EBkuVvoiTMZysYoIzx aTu3yjhUia/vlFzbv0uCGKYFDGhrmxay5qwqEc5wv+AbaQL3TwtllZS3bQUZjcxnAoRG mTqBeu2U6nqsTDriKcR0efkJAgXSgXnISpvQIRbgrOH/coQIr13tfBF2LEZqCqwQeXj3 9l54DNeS1HmS5JjbXKxtyrHkLOJoE8vJWKzP5RpHQ3g/sX18sRKJ0dnirmH54255xZQw LSaDP8KjXx3hIigZMm4tD00baD9061wnVRHVrJ2DN3AUBPqsgyfH9zp3/2DV6XySEJ7J /i3w== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Kh0Z24nrRo8CulmjggTjYpsy8ADRv1RHCAkzggFzOqo=; b=nmWLHaBngTqVtLmHGoNBfYGLSQH3I7lSaPv0oClQBoKRTctwKcjybpJiW0XiRmquiX ONwTuJ6KWzM5Rcy7euaE5NKppBiT+DfJ4FSiREL9hifMc9+jApYHA0HFO6O8OEmhSgIO QNjFPHH2ZvuVcMK+njBthKjqVJI+FysnkVOUlqJRTgOjnJl9ISWJM/HxdX9YLbT0SwmR PPGqrFgiB5yVYuwdhNJ436zFpUQpp7h8V8/mnizYEOfbX5wwH+XV9mU2rfBUBjM0qYMn QETbBSiIUFSXvb4Aske4BtC+Laqp3UUHlf9UujACovv/QvtMECA3UaRyrpCF5uU9Z4il 7Tjw== X-Gm-Message-State: AOAM530/02BXkQskQ+7VqvvLguXcayl0Lv0LtyrLoYWp8lyvdJSIGhZG alQYvxPc5KAHPJNzPywNHKU= X-Google-Smtp-Source: ABdhPJzTXl8P7AReCze57oFAZkussRWXMGswCH8kafFEZ+A1oHWoazDMMoQdqoPoYoo1f2sn7V11Tg== X-Received: by 2002:a05:6a00:e8e:b0:4fa:a52f:59cf with SMTP id bo14-20020a056a000e8e00b004faa52f59cfmr31215863pfb.84.1651082979701; Wed, 27 Apr 2022 11:09:39 -0700 (PDT) Received: from mail.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id u25-20020aa78399000000b00505f75651e7sm19076859pfm.158.2022.04.27.11.09.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 27 Apr 2022 11:09:39 -0700 (PDT) From: Kamal Dasu To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, alcooperx@gmail.com Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kamal Dasu Subject: [PATCH v2 2/4] mmc: sdhci-brcmstb: Enable Clock Gating to save power Date: Wed, 27 Apr 2022 14:08:51 -0400 Message-Id: <20220427180853.35970-3-kdasu.kdev@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220427180853.35970-1-kdasu.kdev@gmail.com> References: <20220427180853.35970-1-kdasu.kdev@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220427_110942_238587_8C2C928A X-CRM114-Status: GOOD ( 19.43 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Al Cooper Enabling this feature will allow the controller to stop the bus clock when the bus is idle. The feature is not part of the standard and is unique to newer Arasan cores and is enabled with a bit in a vendor specific register. This feature will only be enabled for non-removable devices because they don't switch the voltage and clock gating breaks SD Card volatge switching. Signed-off-by: Al Cooper Signed-off-by: Kamal Dasu Acked-by: Florian Fainelli Acked-by: Adrian Hunter --- drivers/mmc/host/sdhci-brcmstb.c | 35 +++++++++++++++++++++++++++++++- 1 file changed, 34 insertions(+), 1 deletion(-) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index 244780481193..683d0c685748 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -17,11 +17,14 @@ #define SDHCI_VENDOR 0x78 #define SDHCI_VENDOR_ENHANCED_STRB 0x1 +#define SDHCI_VENDOR_GATE_SDCLK_EN 0x2 #define BRCMSTB_MATCH_FLAGS_NO_64BIT BIT(0) #define BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT BIT(1) +#define BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE BIT(2) #define BRCMSTB_PRIV_FLAGS_HAS_CQE BIT(0) +#define BRCMSTB_PRIV_FLAGS_GATE_CLOCK BIT(1) #define SDHCI_ARASAN_CQE_BASE_ADDR 0x200 @@ -36,6 +39,27 @@ struct brcmstb_match_priv { const unsigned int flags; }; +static inline void enable_clock_gating(struct sdhci_host *host) +{ + u32 reg; + + reg = sdhci_readl(host, SDHCI_VENDOR); + reg |= SDHCI_VENDOR_GATE_SDCLK_EN; + sdhci_writel(host, reg, SDHCI_VENDOR); +} + +void brcmstb_reset(struct sdhci_host *host, u8 mask) +{ + struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host); + struct sdhci_brcmstb_priv *priv = sdhci_pltfm_priv(pltfm_host); + + sdhci_reset(host, mask); + + /* Reset will clear this, so re-enable it */ + if (priv->flags & BRCMSTB_PRIV_FLAGS_GATE_CLOCK) + enable_clock_gating(host); +} + static void sdhci_brcmstb_hs400es(struct mmc_host *mmc, struct mmc_ios *ios) { struct sdhci_host *host = mmc_priv(mmc); @@ -131,7 +155,7 @@ static struct sdhci_ops sdhci_brcmstb_ops = { static struct sdhci_ops sdhci_brcmstb_ops_7216 = { .set_clock = sdhci_brcmstb_set_clock, .set_bus_width = sdhci_set_bus_width, - .reset = sdhci_reset, + .reset = brcmstb_reset, .set_uhs_signaling = sdhci_brcmstb_set_uhs_signaling, }; @@ -147,6 +171,7 @@ static struct brcmstb_match_priv match_priv_7445 = { }; static const struct brcmstb_match_priv match_priv_7216 = { + .flags = BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE, .hs400es = sdhci_brcmstb_hs400es, .ops = &sdhci_brcmstb_ops_7216, }; @@ -273,6 +298,14 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) if (res) goto err; + /* + * Automatic clock gating does not work for SD cards that may + * voltage switch so only enable it for non-removable devices. + */ + if ((match_priv->flags & BRCMSTB_MATCH_FLAGS_HAS_CLOCK_GATE) && + (host->mmc->caps & MMC_CAP_NONREMOVABLE)) + priv->flags |= BRCMSTB_PRIV_FLAGS_GATE_CLOCK; + /* * If the chip has enhanced strobe and it's enabled, add * callback