| Message ID | 20220428105408.11189-9-nancy.lin@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add MediaTek SoC DRM (vdosys1) support for mt8195 | expand |
Hi, Nancy: On Thu, 2022-04-28 at 18:53 +0800, Nancy.Lin wrote: > Add mtk-mutex support for mt8195 vdosys1. > The vdosys1 path component contains ovl_adaptor, merge5, > and dp_intf1. Ovl_adaptor is composed of several sub-elements > which include MDP_RDMA0~7, MERGE0~3, and ETHDR. > > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> > Reviewed-by: AngeloGioacchino Del Regno < > angelogioacchino.delregno@collabora.com> > --- > drivers/soc/mediatek/mtk-mutex.c | 37 > ++++++++++++++++++++++++++++++++ > 1 file changed, 37 insertions(+) > > diff --git a/drivers/soc/mediatek/mtk-mutex.c > b/drivers/soc/mediatek/mtk-mutex.c > index 981d56967e7a..78197ebf5595 100644 > --- a/drivers/soc/mediatek/mtk-mutex.c > +++ b/drivers/soc/mediatek/mtk-mutex.c > @@ -110,6 +110,24 @@ > #define MT8195_MUTEX_MOD_DISP_DP_INTF0 21 > #define MT8195_MUTEX_MOD_DISP_PWM0 27 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA0 0 > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA1 1 > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA2 2 > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA3 3 > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA4 4 > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA5 5 > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA6 6 > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA7 7 > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE0 8 > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE1 9 > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE2 10 > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE3 11 > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE4 12 > +#define MT8195_MUTEX_MOD_DISP1_DISP_MIXER 18 > +#define MT8195_MUTEX_MOD_DISP1_DPI0 25 > +#define MT8195_MUTEX_MOD_DISP1_DPI1 26 > +#define MT8195_MUTEX_MOD_DISP1_DP_INTF0 27 > + > #define MT2712_MUTEX_MOD_DISP_PWM2 10 > #define MT2712_MUTEX_MOD_DISP_OVL0 11 > #define MT2712_MUTEX_MOD_DISP_OVL1 12 > @@ -313,6 +331,21 @@ static const unsigned int > mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = { > [DDP_COMPONENT_DSI0] = MT8195_MUTEX_MOD_DISP_DSI0, > [DDP_COMPONENT_PWM0] = MT8195_MUTEX_MOD_DISP_PWM0, > [DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0, > + [DDP_COMPONENT_MDP_RDMA0] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA0, > + [DDP_COMPONENT_MDP_RDMA1] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA1, > + [DDP_COMPONENT_MDP_RDMA2] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA2, > + [DDP_COMPONENT_MDP_RDMA3] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA3, > + [DDP_COMPONENT_MDP_RDMA4] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA4, > + [DDP_COMPONENT_MDP_RDMA5] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA5, > + [DDP_COMPONENT_MDP_RDMA6] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA6, > + [DDP_COMPONENT_MDP_RDMA7] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA7, > + [DDP_COMPONENT_MERGE1] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE0, > + [DDP_COMPONENT_MERGE2] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE1, > + [DDP_COMPONENT_MERGE3] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE2, > + [DDP_COMPONENT_MERGE4] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE3, > + [DDP_COMPONENT_ETHDR_MIXER] = > MT8195_MUTEX_MOD_DISP1_DISP_MIXER, > + [DDP_COMPONENT_MERGE5] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE4, > + [DDP_COMPONENT_DP_INTF1] = MT8195_MUTEX_MOD_DISP1_DP_INTF0, > }; > > static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = { > @@ -498,6 +531,9 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex, > case DDP_COMPONENT_DP_INTF0: > sof_id = MUTEX_SOF_DP_INTF0; > break; > + case DDP_COMPONENT_DP_INTF1: > + sof_id = MUTEX_SOF_DP_INTF1; This is not strongly related to mt8195, so move this to an independent patch. > + break; > default: > if (mtx->data->mutex_mod[id] < 32) { > offset = DISP_REG_MUTEX_MOD(mtx->data- > >mutex_mod_reg, > @@ -538,6 +574,7 @@ void mtk_mutex_remove_comp(struct mtk_mutex > *mutex, > case DDP_COMPONENT_DPI0: > case DDP_COMPONENT_DPI1: > case DDP_COMPONENT_DP_INTF0: > + case DDP_COMPONENT_DP_INTF1: Ditto. Regards, CK > writel_relaxed(MUTEX_SOF_SINGLE_MODE, > mtx->regs + > DISP_REG_MUTEX_SOF(mtx->data- > >mutex_sof_reg,
Hi CK, Thanks for the review. On Fri, 2022-04-29 at 17:29 +0800, CK Hu wrote: > Hi, Nancy: > > On Thu, 2022-04-28 at 18:53 +0800, Nancy.Lin wrote: > > Add mtk-mutex support for mt8195 vdosys1. > > The vdosys1 path component contains ovl_adaptor, merge5, > > and dp_intf1. Ovl_adaptor is composed of several sub-elements > > which include MDP_RDMA0~7, MERGE0~3, and ETHDR. > > > > Signed-off-by: Nancy.Lin <nancy.lin@mediatek.com> > > Reviewed-by: AngeloGioacchino Del Regno < > > angelogioacchino.delregno@collabora.com> > > --- > > drivers/soc/mediatek/mtk-mutex.c | 37 > > ++++++++++++++++++++++++++++++++ > > 1 file changed, 37 insertions(+) > > > > diff --git a/drivers/soc/mediatek/mtk-mutex.c > > b/drivers/soc/mediatek/mtk-mutex.c > > index 981d56967e7a..78197ebf5595 100644 > > --- a/drivers/soc/mediatek/mtk-mutex.c > > +++ b/drivers/soc/mediatek/mtk-mutex.c > > @@ -110,6 +110,24 @@ > > #define MT8195_MUTEX_MOD_DISP_DP_INTF0 21 > > #define MT8195_MUTEX_MOD_DISP_PWM0 27 > > > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA0 0 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA1 1 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA2 2 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA3 3 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA4 4 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA5 5 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA6 6 > > +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA7 7 > > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE0 8 > > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE1 9 > > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE2 10 > > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE3 11 > > +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE4 12 > > +#define MT8195_MUTEX_MOD_DISP1_DISP_MIXER 18 > > +#define MT8195_MUTEX_MOD_DISP1_DPI0 25 > > +#define MT8195_MUTEX_MOD_DISP1_DPI1 26 > > +#define MT8195_MUTEX_MOD_DISP1_DP_INTF0 27 > > + > > #define MT2712_MUTEX_MOD_DISP_PWM2 10 > > #define MT2712_MUTEX_MOD_DISP_OVL0 11 > > #define MT2712_MUTEX_MOD_DISP_OVL1 12 > > @@ -313,6 +331,21 @@ static const unsigned int > > mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = { > > [DDP_COMPONENT_DSI0] = MT8195_MUTEX_MOD_DISP_DSI0, > > [DDP_COMPONENT_PWM0] = MT8195_MUTEX_MOD_DISP_PWM0, > > [DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0, > > + [DDP_COMPONENT_MDP_RDMA0] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA0, > > + [DDP_COMPONENT_MDP_RDMA1] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA1, > > + [DDP_COMPONENT_MDP_RDMA2] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA2, > > + [DDP_COMPONENT_MDP_RDMA3] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA3, > > + [DDP_COMPONENT_MDP_RDMA4] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA4, > > + [DDP_COMPONENT_MDP_RDMA5] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA5, > > + [DDP_COMPONENT_MDP_RDMA6] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA6, > > + [DDP_COMPONENT_MDP_RDMA7] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA7, > > + [DDP_COMPONENT_MERGE1] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE0, > > + [DDP_COMPONENT_MERGE2] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE1, > > + [DDP_COMPONENT_MERGE3] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE2, > > + [DDP_COMPONENT_MERGE4] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE3, > > + [DDP_COMPONENT_ETHDR_MIXER] = > > MT8195_MUTEX_MOD_DISP1_DISP_MIXER, > > + [DDP_COMPONENT_MERGE5] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE4, > > + [DDP_COMPONENT_DP_INTF1] = MT8195_MUTEX_MOD_DISP1_DP_INTF0, > > }; > > > > static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = { > > @@ -498,6 +531,9 @@ void mtk_mutex_add_comp(struct mtk_mutex > > *mutex, > > case DDP_COMPONENT_DP_INTF0: > > sof_id = MUTEX_SOF_DP_INTF0; > > break; > > + case DDP_COMPONENT_DP_INTF1: > > + sof_id = MUTEX_SOF_DP_INTF1; > > This is not strongly related to mt8195, so move this to an > independent > patch. > OK, I will separate this to an independent patch. Regards, Nancy > > + break; > > default: > > if (mtx->data->mutex_mod[id] < 32) { > > offset = DISP_REG_MUTEX_MOD(mtx->data- > > > mutex_mod_reg, > > > > @@ -538,6 +574,7 @@ void mtk_mutex_remove_comp(struct mtk_mutex > > *mutex, > > case DDP_COMPONENT_DPI0: > > case DDP_COMPONENT_DPI1: > > case DDP_COMPONENT_DP_INTF0: > > + case DDP_COMPONENT_DP_INTF1: > > Ditto. > > Regards, > CK > > > writel_relaxed(MUTEX_SOF_SINGLE_MODE, > > mtx->regs + > > DISP_REG_MUTEX_SOF(mtx->data- > > > mutex_sof_reg, > >
diff --git a/drivers/soc/mediatek/mtk-mutex.c b/drivers/soc/mediatek/mtk-mutex.c index 981d56967e7a..78197ebf5595 100644 --- a/drivers/soc/mediatek/mtk-mutex.c +++ b/drivers/soc/mediatek/mtk-mutex.c @@ -110,6 +110,24 @@ #define MT8195_MUTEX_MOD_DISP_DP_INTF0 21 #define MT8195_MUTEX_MOD_DISP_PWM0 27 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA0 0 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA1 1 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA2 2 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA3 3 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA4 4 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA5 5 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA6 6 +#define MT8195_MUTEX_MOD_DISP1_MDP_RDMA7 7 +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE0 8 +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE1 9 +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE2 10 +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE3 11 +#define MT8195_MUTEX_MOD_DISP1_VPP_MERGE4 12 +#define MT8195_MUTEX_MOD_DISP1_DISP_MIXER 18 +#define MT8195_MUTEX_MOD_DISP1_DPI0 25 +#define MT8195_MUTEX_MOD_DISP1_DPI1 26 +#define MT8195_MUTEX_MOD_DISP1_DP_INTF0 27 + #define MT2712_MUTEX_MOD_DISP_PWM2 10 #define MT2712_MUTEX_MOD_DISP_OVL0 11 #define MT2712_MUTEX_MOD_DISP_OVL1 12 @@ -313,6 +331,21 @@ static const unsigned int mt8195_mutex_mod[DDP_COMPONENT_ID_MAX] = { [DDP_COMPONENT_DSI0] = MT8195_MUTEX_MOD_DISP_DSI0, [DDP_COMPONENT_PWM0] = MT8195_MUTEX_MOD_DISP_PWM0, [DDP_COMPONENT_DP_INTF0] = MT8195_MUTEX_MOD_DISP_DP_INTF0, + [DDP_COMPONENT_MDP_RDMA0] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA0, + [DDP_COMPONENT_MDP_RDMA1] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA1, + [DDP_COMPONENT_MDP_RDMA2] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA2, + [DDP_COMPONENT_MDP_RDMA3] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA3, + [DDP_COMPONENT_MDP_RDMA4] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA4, + [DDP_COMPONENT_MDP_RDMA5] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA5, + [DDP_COMPONENT_MDP_RDMA6] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA6, + [DDP_COMPONENT_MDP_RDMA7] = MT8195_MUTEX_MOD_DISP1_MDP_RDMA7, + [DDP_COMPONENT_MERGE1] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE0, + [DDP_COMPONENT_MERGE2] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE1, + [DDP_COMPONENT_MERGE3] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE2, + [DDP_COMPONENT_MERGE4] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE3, + [DDP_COMPONENT_ETHDR_MIXER] = MT8195_MUTEX_MOD_DISP1_DISP_MIXER, + [DDP_COMPONENT_MERGE5] = MT8195_MUTEX_MOD_DISP1_VPP_MERGE4, + [DDP_COMPONENT_DP_INTF1] = MT8195_MUTEX_MOD_DISP1_DP_INTF0, }; static const unsigned int mt2712_mutex_sof[DDP_MUTEX_SOF_MAX] = { @@ -498,6 +531,9 @@ void mtk_mutex_add_comp(struct mtk_mutex *mutex, case DDP_COMPONENT_DP_INTF0: sof_id = MUTEX_SOF_DP_INTF0; break; + case DDP_COMPONENT_DP_INTF1: + sof_id = MUTEX_SOF_DP_INTF1; + break; default: if (mtx->data->mutex_mod[id] < 32) { offset = DISP_REG_MUTEX_MOD(mtx->data->mutex_mod_reg, @@ -538,6 +574,7 @@ void mtk_mutex_remove_comp(struct mtk_mutex *mutex, case DDP_COMPONENT_DPI0: case DDP_COMPONENT_DPI1: case DDP_COMPONENT_DP_INTF0: + case DDP_COMPONENT_DP_INTF1: writel_relaxed(MUTEX_SOF_SINGLE_MODE, mtx->regs + DISP_REG_MUTEX_SOF(mtx->data->mutex_sof_reg,