From patchwork Tue May 3 12:35:36 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: German Gomez X-Patchwork-Id: 12835741 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 52BC3C433EF for ; Tue, 3 May 2022 12:36:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-Id:Date:Subject:Cc :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=z5cI2JZoenPJUf2UZ+GBp4mTFDBNX1Szsew2YYhpRrY=; b=cVCUXb2ahteMrU u/585V9vwoIWHHNxHF5OQ9Q1zwgGYuLTBlMS0uUqBxQ9jpgv7gXTlHs2CgAy0AdFUmYl41c2IBQLW vuiZWn/xZYumtwB1LHecdA5dvpRNFz+IvHV5AxRhB2VgbIGLTkm7SkOys0o6eLGZ4lQRU8CeUkrJP zi30CR63rakLR9zaC0DySNJzRUItFCMJW7/BQ8+0ysP0e8h0lkdQ5+G9NzWPP3AOzSQdP/tRH2HKv 4IF46Ln9/l5K6jjJkvLOaVFn/yBHehCW90AcgoVqgvNuMyYOWCjoqGjVpL2ypxAbOwqlmVBgynU+I 5Y3ZSItYqzBWLOko1I2g==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nlrkv-005oXH-TT; Tue, 03 May 2022 12:35:53 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nlrks-005oVl-7z for linux-arm-kernel@lists.infradead.org; Tue, 03 May 2022 12:35:51 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id A8D631042; Tue, 3 May 2022 05:35:48 -0700 (PDT) Received: from e127744.cambridge.arm.com (e127744.cambridge.arm.com [10.1.28.130]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 916BB3F73D; Tue, 3 May 2022 05:35:46 -0700 (PDT) From: German Gomez To: coresight@lists.linaro.org, mathieu.poirier@linaro.org, suzuki.poulose@arm.com Cc: james.clark@arm.com, leo.yan@linaro.org, mike.leach@linaro.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, German Gomez Subject: [PATCH v2 1/2] coresight: etm4x: Expose default timestamp source in sysfs Date: Tue, 3 May 2022 13:35:36 +0100 Message-Id: <20220503123537.1003035-1-german.gomez@arm.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220503_053550_370230_64DB6719 X-CRM114-Status: GOOD ( 11.66 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add a new sysfs interface in /sys/bus/coresight/devices/etm/ts_source indicating the configured timestamp source when the ETM device driver was probed. The perf tool will use this information to detect if the trace data timestamp matches the kernel time, enabling correlation of CoreSight trace with perf events. Suggested-by: Suzuki K Poulose Signed-off-by: German Gomez Reviewed-by: Leo Yan --- v1: - https://lore.kernel.org/all/20220429123100.268059-2-german.gomez@arm.com/ v2: - Inline etmv4_to_ts_source() function. - Collect review tag from Leo. --- arch/arm64/include/asm/sysreg.h | 1 + .../coresight/coresight-etm4x-sysfs.c | 29 +++++++++++++++++++ 2 files changed, 30 insertions(+) diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 38508e507d73a..263a7bee06f9a 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -1146,6 +1146,7 @@ #define SYS_MPIDR_SAFE_VAL (BIT(31)) #define TRFCR_ELx_TS_SHIFT 5 +#define TRFCR_ELx_TS_MASK ((0x3UL) << TRFCR_ELx_TS_SHIFT) #define TRFCR_ELx_TS_VIRTUAL ((0x1UL) << TRFCR_ELx_TS_SHIFT) #define TRFCR_ELx_TS_GUEST_PHYSICAL ((0x2UL) << TRFCR_ELx_TS_SHIFT) #define TRFCR_ELx_TS_PHYSICAL ((0x3UL) << TRFCR_ELx_TS_SHIFT) diff --git a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c index a0640fa5c55bd..2a48827a4e135 100644 --- a/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c +++ b/drivers/hwtracing/coresight/coresight-etm4x-sysfs.c @@ -2264,6 +2264,34 @@ static ssize_t cpu_show(struct device *dev, } static DEVICE_ATTR_RO(cpu); +static ssize_t ts_source_show(struct device *dev, + struct device_attribute *attr, + char *buf) +{ + int val; + struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent); + + if (!drvdata->trfcr) { + val = -1; + goto out; + } + + switch (drvdata->trfcr & TRFCR_ELx_TS_MASK) { + case TRFCR_ELx_TS_VIRTUAL: + case TRFCR_ELx_TS_GUEST_PHYSICAL: + case TRFCR_ELx_TS_PHYSICAL: + val = FIELD_GET(TRFCR_ELx_TS_MASK, drvdata->trfcr); + break; + default: + val = -1; + break; + } + +out: + return sysfs_emit(buf, "%d\n", val); +} +static DEVICE_ATTR_RO(ts_source); + static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_nr_pe_cmp.attr, &dev_attr_nr_addr_cmp.attr, @@ -2318,6 +2346,7 @@ static struct attribute *coresight_etmv4_attrs[] = { &dev_attr_vmid_val.attr, &dev_attr_vmid_masks.attr, &dev_attr_cpu.attr, + &dev_attr_ts_source.attr, NULL, };