From patchwork Thu May 5 19:45:43 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= X-Patchwork-Id: 12840104 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 766D9C433F5 for ; Thu, 5 May 2022 19:49:43 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=+mG/cKThXl/gufa8mYHOIKMsAnArJqdxmSY7fJ9Hh6k=; b=TaHsU6DfJ6WYDn lP9Hybq+maEAZtejwjE7emYzIY4g6hD/PW9+5nUCs7I8Kr0y0Rl2IuJmOx+WV67xu7KfIrbDjVyy4 jp+HQvJgDYIlqym9H5a5H+MvhcYAHx+kovJRtqJgqiAz0eb7DzDl/8UEo4M6Jk/8p+B7YKMC23dDE FtzzZd0GFIChZP1Y+pupslNq7OoITtyNy1CWzoklD2b+2ZQuwqq3jrdxj2QA125WxoOyrdA/xF3Si 6ue9n63PL6Jrq/UtVh+hdY54O66Vjcn0EwM5QSFl1cylksxxu/j0B8azq5owsNDMpTHyUnE0+L5dW TCr5g2/epFjBv4PzhWsw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhSo-00HZHv-Up; Thu, 05 May 2022 19:48:39 +0000 Received: from bhuna.collabora.co.uk ([46.235.227.227]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmhQv-00HXqF-Ji; Thu, 05 May 2022 19:46:43 +0000 Received: from [127.0.0.1] (localhost [127.0.0.1]) (Authenticated sender: nfraprado) with ESMTPSA id 782D21F45CCE DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1651780000; bh=4PBOh4M6bJ2M0kJAtlVqT+bTLE2+DOSd+p4NN3H8MQA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=QKA+47hAV5ct/svISUIaYtGG5R/sdS7fMhJs89/a16lQCxjf4o4CjsvkqnJsXgiDz N1sey4E/PkrX2KyFuS6rkShD0Kvg+iNGap4LHhiWSAMQlUNrsLFnrKMkDjlYDZv5g0 rYcJGUjOd3YvvKd/WDl9WTTki2G2q3DdWgOJasAtiRQGabVMDSAxvx4GQMnUTRkPHK riayXt8vZGtRcfIy4/akKmcd4FSVaYjDsY6RSr8+mdRkcJ3cukG+2saQFOKurxl2Uu 9paXDzzT1t88+gVXu4HMr9Dzskn0I//D6F0mEmAP93j476tPJ0zOMLiu6Oa27+EcP9 matsHtM8koagg== From: =?utf-8?b?TsOtY29sYXMgRi4gUi4gQS4gUHJhZG8=?= To: Matthias Brugger Cc: AngeloGioacchino Del Regno , kernel@collabora.com, Chen-Yu Tsai , =?utf-8?b?TsOtY29s?= =?utf-8?b?YXMgRi4gUi4gQS4gUHJhZG8=?= , Krzysztof Kozlowski , Rob Herring , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org Subject: [PATCH v2 09/16] arm64: dts: mediatek: asurada: Add Cr50 TPM Date: Thu, 5 May 2022 15:45:43 -0400 Message-Id: <20220505194550.3094656-10-nfraprado@collabora.com> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220505194550.3094656-1-nfraprado@collabora.com> References: <20220505194550.3094656-1-nfraprado@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220505_124641_865524_1CD60EF0 X-CRM114-Status: GOOD ( 10.53 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The Asurada platform has a Google Security Chip connected to the SPI5 bus. It runs the cr50 firmware and provides TPM functionality. Add support for it. Signed-off-by: Nícolas F. R. A. Prado Reviewed-by: AngeloGioacchino Del Regno --- (no changes since v1) .../arm64/boot/dts/mediatek/mt8192-asurada.dtsi | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi index a1cbf7a375b6..5221f1d1b7dc 100644 --- a/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8192-asurada.dtsi @@ -5,6 +5,7 @@ */ /dts-v1/; #include "mt8192.dtsi" +#include / { aliases { @@ -353,6 +354,13 @@ &pio { "AUD_DAT_MISO0", "AUD_DAT_MISO1"; + cr50_int: cr50-irq-default-pins { + pins-gsc-ap-int-odl { + pinmux = ; + input-enable; + }; + }; + cros_ec_int: cros-ec-irq-default-pins { pins-ec-ap-int-odl { pinmux = ; @@ -517,6 +525,15 @@ &spi5 { mediatek,pad-select = <0>; pinctrl-names = "default"; pinctrl-0 = <&spi5_pins>; + + cr50@0 { + compatible = "google,cr50"; + reg = <0>; + interrupts-extended = <&pio 171 IRQ_TYPE_EDGE_RISING>; + spi-max-frequency = <1000000>; + pinctrl-names = "default"; + pinctrl-0 = <&cr50_int>; + }; }; &uart0 {