From patchwork Fri May 6 08:23:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12840759 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CC34CC433F5 for ; Fri, 6 May 2022 08:29:45 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=JhqriAwUzOoWmbIqHeTGq/lj2YOa73XArDEnao3kT2c=; b=Qu6ImaF/xfwvw4 3+AY2ng126D46Q2mTVTD16wJ/lYynADdcD+cwE1tRquOXsTOcPdHIzU16b0NY5etsoYBQ3hm07YRS uqXe12TZ4e2Q8ZV5RJyiPWYeS/fKTKM3l6Bqu1LantVmbEAY9IJgtn8T7xqKnENjtr4YqTsZF03dS ljes8zlV55rTV3dRWThx/i+2stWSqnIOtwHye4ccK9fKcWlitCVCNRFX9HrSJLvMPp5PPYGA4fuaI ZNYO4Neq8R9bOZt/GCtgbiIisSVh+YvjkkiNafj9d9YyQlUw5g+JV9rXp4s3URhaOcwDjIyzjTYaN ksO1zJEWnBvgTRgoD5tg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmtKK-0025le-Ne; Fri, 06 May 2022 08:28:41 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmtDK-0022ft-N7 for linux-arm-kernel@lists.infradead.org; Fri, 06 May 2022 08:21:31 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1651825286; x=1683361286; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=eCZ7tf8swc42sTh2YWD4MFvR2VJQhs2OP1xbpe/qwKk=; b=SRdQrASzcgtL83RjAcFFKj+WIh7kznekv9g8BiW5cV1xWmRkp83bnvRC R3j9zKRjAf1CtTlKZRNHET8CibqrVSvOgEJiYsNwDLDlhp+ezXgpZRP0E AD6eH9MsSHMR4n+/qSmbpt6IjJ7ZlHStAmRkqZUh9c4Yg7GF/MKk80Ynt u6QIDaPHP3m8sCbQg3lQhBUoYJb2Z7kdOp/gF5QrDKicpOKTd4Wlx2OBM tKZByQXBzyB4tPXnP5PYqtSH0DBBrdgjjmDZFbXHatHjr1CZOm2er3J4l LxoB8BKbTOfwbZ0mYIkkc7CzPU67Ac8uu25fTwKyfQin3c79t3dux8Xnn Q==; X-IronPort-AV: E=Sophos;i="5.91,203,1647327600"; d="scan'208";a="162959415" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa3.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 06 May 2022 01:21:23 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 6 May 2022 01:21:23 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 6 May 2022 01:21:21 -0700 From: Claudiu Beznea To: , , CC: , , Claudiu Beznea Subject: [PATCH v3 3/4] ARM: at91: pm: use kernel documentation style Date: Fri, 6 May 2022 11:23:34 +0300 Message-ID: <20220506082335.3817259-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220506082335.3817259-1-claudiu.beznea@microchip.com> References: <20220506082335.3817259-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220506_012126_814512_D180E3C2 X-CRM114-Status: GOOD ( 10.25 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Use kernel documentation style. Along with it fix the naming of struct at91_pm_sfrbu_regs in documentation. Signed-off-by: Claudiu Beznea --- arch/arm/mach-at91/pm.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c index 2a52ddac7692..84ada8e2a7fd 100644 --- a/arch/arm/mach-at91/pm.c +++ b/arch/arm/mach-at91/pm.c @@ -47,8 +47,8 @@ struct at91_pm_bu { unsigned long ddr_phy_calibration[BACKUP_DDR_PHY_CALIBRATION]; }; -/* - * struct at91_pm_sfrbu_offsets: registers mapping for SFRBU +/** + * struct at91_pm_sfrbu_regs - registers mapping for SFRBU * @pswbu: power switch BU control registers */ struct at91_pm_sfrbu_regs { @@ -81,7 +81,7 @@ struct at91_soc_pm { }; /** - * enum at91_pm_iomaps: IOs that needs to be mapped for different PM modes + * enum at91_pm_iomaps - IOs that needs to be mapped for different PM modes * @AT91_PM_IOMAP_SHDWC: SHDWC controller * @AT91_PM_IOMAP_SFRBU: SFRBU controller */