From patchwork Fri May 6 13:40:24 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12841175 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5FEC4C433EF for ; Fri, 6 May 2022 13:42:22 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=DQsJMMakKt0PUEDeFnGUL2NBK7Ti6pcOgdixBAhvYN8=; b=Z/MuwmeXOQ1aHk OQe0sqLHa6+zlI+8Fd2qDpHOVcpfEZpl/vpvfPmo0YCo4jqBQMEQr0Pjov0vIpRcjFXJAOpUTCMXi FDJ9+5OV/cUiarHyZ9iVcy/O9SRt3nnGqX4ItCg8oC0NGp2ClqO+yS+ba/8KW/VArvmMRlcVvaFoR nA+8zaTfRG+6CBtPNZqvdCfpdJYeXhGG4ISn1GTiksV3ug8V3rP1htfmUiIL68ay5tE5YqrOoJpN1 GuW3ih32SuT6x+aicQPVcxZ3OVfjHGcW1Tlql0npokGvybC8Fbe6eqWPyfVd7kMpWJKgBBhglopS6 In1gpqsz+esvQ4I9W+bQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmyCr-003YT2-Fv; Fri, 06 May 2022 13:41:17 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nmyCL-003YAq-DI for linux-arm-kernel@lists.infradead.org; Fri, 06 May 2022 13:40:47 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 02120B8346C; Fri, 6 May 2022 13:40:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 92A23C385AA; Fri, 6 May 2022 13:40:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1651844442; bh=BcPBeM8K8k7DoVQJlpk7FQyNGP2EPhIvqXciXnoQMFs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oTGEPTrhUkuVAOPzIFZayAfVu81c6KkvYSNThqiGPWaRzML/+Ef/0WkGWwuN2EupR 4a4LpMG5+11YJsAYc/h0gMHOfXXAMbZv0M+phbEsU4B8+khLj075UL4mA7WMm9yEqL 84EmwJtmt0aMYytZZf1boBMDhkeDYOVJKE97ojmovYNY22TOLn7pALAint0HUpIN7L 0Je2zatXahW/UjjWTPGtOmp9VsfdZycrmSLzP/t9HW1/q3EeJEu7mHYAIWimSvScyu Kav4joF9KkZXKv64SdBo0Zbv1S4yX2t4mEgQlFIGQbLrLErkBKng7mF4HQ2YmicGH6 2BMtpCSqljW7Q== Received: by pali.im (Postfix) id D6B9E11FA; Fri, 6 May 2022 15:40:39 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Thomas Gleixner , Marc Zyngier , Rob Herring , Bjorn Helgaas , Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Thomas Petazzoni , Lorenzo Pieralisi , =?utf-8?q?Krzysztof_Wilczy?= =?utf-8?q?=C5=84ski?= , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pci@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 1/6] dt-bindings: irqchip: armada-370-xp: Update information about MPIC SoC Error Date: Fri, 6 May 2022 15:40:24 +0200 Message-Id: <20220506134029.21470-2-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220506134029.21470-1-pali@kernel.org> References: <20220506134029.21470-1-pali@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220506_064045_675966_0E4DCD30 X-CRM114-Status: GOOD ( 11.37 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Signed-off-by: Pali Rohár --- .../interrupt-controller/marvell,armada-370-xp-mpic.txt | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt index 5fc03134a999..8cddbc16ddbd 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt +++ b/Documentation/devicetree/bindings/interrupt-controller/marvell,armada-370-xp-mpic.txt @@ -24,6 +24,11 @@ Optional properties: connected as a slave to the Cortex-A9 GIC. The provided interrupt indicate to which GIC interrupt the MPIC output is connected. +Optional subnodes: + +- interrupt-controller@20 with interrupt-controller property for + MPIC SoC Error IRQ controller + Example: mpic: interrupt-controller@d0020000 { @@ -35,4 +40,8 @@ Example: msi-controller; reg = <0xd0020a00 0x1d0>, <0xd0021070 0x58>; + soc_err: interrupt-controller@20 { + interrupt-controller; + #interrupt-cells = <1>; + }; };