From patchwork Tue May 10 01:52:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nobuhiro Iwamatsu X-Patchwork-Id: 12844401 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 72A1BC433F5 for ; Tue, 10 May 2022 01:56:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=VbQOZB+sgKc6QmLtnSpPbfWlCF7DH6tW4wzcv3TuQA4=; b=Ped1E5xVx9ROfw dlqyVb/+YqY9ZUSzWCOa5+Be6L9uOcyQKLayngGMdSXO95Rcmaibei6CvJq/DKVgs9fpvGpu+Et6t ail/6z3zRb2GXdNfo3I2dDJm4Wekrqea8QSwiN8ApkKv6qS+6WzAly+tbT1WxVsGGb+mPvdePByig L4Gxt+zgrJXdvhxt6EqTY+Gb9k7N6m0qMvm21wMUhGUhhFQik11ibNkS4Zta3QKuHrm9VFikSzaTI DjwmEU1jlJB/+6kH35URzHILfUZSzdfY3dVL1sUd0laglOlUUPHmWSLlScWJmjovwxBqZpLBh52lG 0FD3N8iwDUBYZupqkjvA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF58-00H4Kb-TN; Tue, 10 May 2022 01:54:34 +0000 Received: from mo-csw1515.securemx.jp ([210.130.202.154] helo=mo-csw.securemx.jp) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1noF3i-00H3lL-AK for linux-arm-kernel@lists.infradead.org; Tue, 10 May 2022 01:53:10 +0000 Received: by mo-csw.securemx.jp (mx-mo-csw1515) id 24A1qitE021488; Tue, 10 May 2022 10:52:44 +0900 X-Iguazu-Qid: 34tKMNGQISoOUyKFxf X-Iguazu-QSIG: v=2; s=0; t=1652147564; q=34tKMNGQISoOUyKFxf; m=tTZIWtyWe8wzEuERRF1BanNQhESQ6HwBHYCTt79WgW4= Received: from imx2-a.toshiba.co.jp (imx2-a.toshiba.co.jp [106.186.93.35]) by relay.securemx.jp (mx-mr1510) id 24A1qhl6025328 (version=TLSv1.2 cipher=AES128-GCM-SHA256 bits=128 verify=NOT); Tue, 10 May 2022 10:52:43 +0900 From: Nobuhiro Iwamatsu To: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Arnd Bergmann , Olof Johansson , yuji2.ishikawa@toshiba.co.jp, Nobuhiro Iwamatsu Subject: [PATCH 1/9] arm64: dts: visconti: Update the clock providers for UART Date: Tue, 10 May 2022 10:52:21 +0900 X-TSB-HOP2: ON Message-Id: <20220510015229.139818-2-nobuhiro1.iwamatsu@toshiba.co.jp> X-Mailer: git-send-email 2.36.0 In-Reply-To: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> References: <20220510015229.139818-1-nobuhiro1.iwamatsu@toshiba.co.jp> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220509_185306_599492_F9F14835 X-CRM114-Status: UNSURE ( 9.70 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Remove fixed clock and source common clock for UART. Signed-off-by: Nobuhiro Iwamatsu --- arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts | 4 ---- .../boot/dts/toshiba/tmpv7708-visrobo-vrb.dts | 4 ---- arch/arm64/boot/dts/toshiba/tmpv7708.dtsi | 14 ++++++++------ 3 files changed, 8 insertions(+), 14 deletions(-) diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts index 9375b0faeea2..9b0666df6593 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts @@ -32,14 +32,10 @@ memory@80000000 { &uart0 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &uart1 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &piether { diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts index d0817463706e..56701e0e1dab 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts +++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrb.dts @@ -32,14 +32,10 @@ memory@80000000 { &uart0 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &uart1 { status = "okay"; - clocks = <&uart_clk>; - clock-names = "apb_pclk"; }; &piether { diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi index 1683113a3c43..3b51e875630c 100644 --- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi +++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi @@ -129,12 +129,6 @@ timer { ; }; - uart_clk: uart-clk { - compatible = "fixed-clock"; - clock-frequency = <150000000>; - #clock-cells = <0>; - }; - clk25mhz: clk25mhz { compatible = "fixed-clock"; #clock-cells = <0>; @@ -243,6 +237,8 @@ uart0: serial@28200000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart0_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART0>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -252,6 +248,8 @@ uart1: serial@28201000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart1_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART1>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -261,6 +259,8 @@ uart2: serial@28202000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart2_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART2>; + clock-names = "apb_pclk"; status = "disabled"; }; @@ -270,6 +270,8 @@ uart3: serial@28203000 { interrupts = ; pinctrl-names = "default"; pinctrl-0 = <&uart3_pins>; + clocks = <&pismu TMPV770X_CLK_PIUART2>; + clock-names = "apb_pclk"; status = "disabled"; };