diff mbox series

[4/9] arm64: dts: visconti: Update the clock providers for SPI

Message ID 20220510015229.139818-5-nobuhiro1.iwamatsu@toshiba.co.jp (mailing list archive)
State New, archived
Headers show
Series Visconti5: Update the clock providers | expand

Commit Message

Nobuhiro Iwamatsu May 10, 2022, 1:52 a.m. UTC
Remove fixed clock and source common clock for SPI.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
 .../dts/toshiba/tmpv7708-visrobo-vrc.dtsi     |  2 --
 arch/arm64/boot/dts/toshiba/tmpv7708.dtsi     | 21 ++++++++++++-------
 2 files changed, 14 insertions(+), 9 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
index adfe8406c24c..0c8321022a73 100644
--- a/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708-visrobo-vrc.dtsi
@@ -25,8 +25,6 @@  &spi0_pins {
 
 &spi0 {
 	status = "okay";
-	clocks = <&clk300mhz>, <&clk150mhz>;
-	clock-names = "sspclk", "apb_pclk";
 
 	mmc-slot@0 {
 		compatible = "mmc-spi-slot";
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
index 6050796a1678..196cda7b5d90 100644
--- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
@@ -143,13 +143,6 @@  clk125mhz: clk125mhz {
 		clock-output-names = "clk125mhz";
 	};
 
-	clk150mhz: clk150mhz {
-		compatible = "fixed-clock";
-		clock-frequency = <150000000>;
-		#clock-cells = <0>;
-		clock-output-names = "clk150mhz";
-	};
-
 	clk300mhz: clk300mhz {
 		compatible = "fixed-clock";
 		clock-frequency = <300000000>;
@@ -395,6 +388,8 @@  spi0: spi@28140000 {
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			clocks = <&pismu TMPV770X_CLK_PISPI1>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -407,6 +402,8 @@  spi1: spi@28141000 {
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			clocks = <&pismu TMPV770X_CLK_PISPI1>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -419,6 +416,8 @@  spi2: spi@28142000 {
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			clocks = <&pismu TMPV770X_CLK_PISPI2>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -431,6 +430,8 @@  spi3: spi@28143000 {
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			clocks = <&pismu TMPV770X_CLK_PISPI3>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -443,6 +444,8 @@  spi4: spi@28144000 {
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			clocks = <&pismu TMPV770X_CLK_PISPI4>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -455,6 +458,8 @@  spi5: spi@28145000 {
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			clocks = <&pismu TMPV770X_CLK_PISPI5>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};
 
@@ -467,6 +472,8 @@  spi6: spi@28146000 {
 			num-cs = <1>;
 			#address-cells = <1>;
 			#size-cells = <0>;
+			clocks = <&pismu TMPV770X_CLK_PISPI6>;
+			clock-names = "apb_pclk";
 			status = "disabled";
 		};