diff mbox series

[6/9] arm64: dts: visconti: Update the clock providers for PCIe host controller

Message ID 20220510015229.139818-7-nobuhiro1.iwamatsu@toshiba.co.jp (mailing list archive)
State New, archived
Headers show
Series Visconti5: Update the clock providers | expand

Commit Message

Nobuhiro Iwamatsu May 10, 2022, 1:52 a.m. UTC
Remove fixed clock and source common clock for PCIe host controller.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
---
 arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts |  2 --
 arch/arm64/boot/dts/toshiba/tmpv7708.dtsi        | 16 ++--------------
 2 files changed, 2 insertions(+), 16 deletions(-)
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
index 527bb437dd90..d209fdc98597 100644
--- a/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708-rm-mbrc.dts
@@ -72,6 +72,4 @@  &pwm {
 
 &pcie {
 	status = "okay";
-	clocks = <&extclk100mhz>, <&clk600mhz>, <&clk25mhz>;
-	clock-names = "ref", "core", "aux";
 };
diff --git a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
index 7c80a9434e10..0fc32c036f30 100644
--- a/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
+++ b/arch/arm64/boot/dts/toshiba/tmpv7708.dtsi
@@ -129,20 +129,6 @@  timer {
 			<GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_LOW)>;
 	};
 
-	clk25mhz: clk25mhz {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <25000000>;
-		clock-output-names = "clk25mhz";
-	};
-
-	clk600mhz: clk600mhz {
-		compatible = "fixed-clock";
-		#clock-cells = <0>;
-		clock-frequency = <600000000>;
-		clock-output-names = "clk600mhz";
-	};
-
 	extclk100mhz: extclk100mhz {
 		compatible = "fixed-clock";
 		#clock-cells = <0>;
@@ -520,6 +506,8 @@  pcie: pcie@28400000 {
 				 0 0 0 3 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH
 				 0 0 0 4 &gic GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 			max-link-speed = <2>;
+			clocks = <&extclk100mhz>, <&pismu TMPV770X_CLK_PCIE_MSTR>, <&pismu TMPV770X_CLK_PCIE_AUX>;
+			clock-names = "ref", "core", "aux";
 			status = "disabled";
 		};
 	};