| Message ID | 20220516121619.2617401-1-s.trumtrar@pengutronix.de (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [v2,1/3] ARM: dts: stm32: add SRAM binding | expand |
Hello Steffen, On 16.05.22 14:16, Steffen Trumtrar wrote: > The STM32 has an SRAM from 0x1000000 to 0x10060000. s/STM32/STM32MP15x/, also append an 'in stm32mp151.dtsi' to the title, to clarify it's not about the MCUs. > Make it available via mmio-sram. > > Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> > --- > arch/arm/boot/dts/stm32mp151.dtsi | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi > index 08708346d583..1816d9b02bb8 100644 > --- a/arch/arm/boot/dts/stm32mp151.dtsi > +++ b/arch/arm/boot/dts/stm32mp151.dtsi > @@ -122,6 +122,14 @@ soc { > interrupt-parent = <&intc>; > ranges; > > + sram: sram@10000000 { We already have /ahb/m4@10000000, which is status = "disabled", but can be used by remoteproc. Of course, boards are free to use the SRAM from Linux too, but status should be disabled to avoid breaking existing boards. Also, this is not the only SRAM on the SoC, could you change the label to the name used in the datasheet/reference manual? Thanks, Ahmad > + compatible = "mmio-sram"; > + reg = <0x10000000 0x60000>; > + #address-cells = <1>; > + #size-cells = <1>; > + ranges = <0 0x10000000 0x60000>; > + }; > + > timers2: timer@40000000 { > #address-cells = <1>; > #size-cells = <0>;
On 16.05.22 14:24, Ahmad Fatoum wrote: > Hello Steffen, > > On 16.05.22 14:16, Steffen Trumtrar wrote: >> The STM32 has an SRAM from 0x1000000 to 0x10060000. > > s/STM32/STM32MP15x/, also append an 'in stm32mp151.dtsi' to the title, > to clarify it's not about the MCUs. > >> Make it available via mmio-sram. >> >> Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> >> --- >> arch/arm/boot/dts/stm32mp151.dtsi | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi >> index 08708346d583..1816d9b02bb8 100644 >> --- a/arch/arm/boot/dts/stm32mp151.dtsi >> +++ b/arch/arm/boot/dts/stm32mp151.dtsi >> @@ -122,6 +122,14 @@ soc { >> interrupt-parent = <&intc>; >> ranges; >> >> + sram: sram@10000000 { > > We already have /ahb/m4@10000000, which is status = "disabled", but can be > used by remoteproc. Of course, boards are free to use the SRAM from Linux > too, but status should be disabled to avoid breaking existing boards. > > Also, this is not the only SRAM on the SoC, could you change the label > to the name used in the datasheet/reference manual? Also, move the new node to the correct /ahb bus. > > Thanks, > Ahmad > >> + compatible = "mmio-sram"; >> + reg = <0x10000000 0x60000>; >> + #address-cells = <1>; >> + #size-cells = <1>; >> + ranges = <0 0x10000000 0x60000>; >> + }; >> + >> timers2: timer@40000000 { >> #address-cells = <1>; >> #size-cells = <0>; > >
diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 08708346d583..1816d9b02bb8 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -122,6 +122,14 @@ soc { interrupt-parent = <&intc>; ranges; + sram: sram@10000000 { + compatible = "mmio-sram"; + reg = <0x10000000 0x60000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x10000000 0x60000>; + }; + timers2: timer@40000000 { #address-cells = <1>; #size-cells = <0>;
The STM32 has an SRAM from 0x1000000 to 0x10060000. Make it available via mmio-sram. Signed-off-by: Steffen Trumtrar <s.trumtrar@pengutronix.de> --- arch/arm/boot/dts/stm32mp151.dtsi | 8 ++++++++ 1 file changed, 8 insertions(+)