diff mbox series

[v2,1/2] dt-bindings: microchip-otpc: document Microchip OTPC

Message ID 20220517125822.579580-2-claudiu.beznea@microchip.com (mailing list archive)
State New, archived
Headers show
Series nvmem: add Microchip OTP controller | expand

Commit Message

Claudiu Beznea May 17, 2022, 12:58 p.m. UTC 
Document Microchip OTP controller.

Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
---
 .../nvmem/microchip-sama7g5,otpc.yaml         | 50 +++++++++++++++++++
 .../nvmem/microchip-sama7g5,otpc.h            | 12 +++++
 2 files changed, 62 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/nvmem/microchip-sama7g5,otpc.yaml
 create mode 040000 include/dt-bindings/nvmem
 create mode 100644 include/dt-bindings/nvmem/microchip-sama7g5,otpc.h

Comments

Krzysztof Kozlowski May 17, 2022, 2:08 p.m. UTC | #1 
On 17/05/2022 14:58, Claudiu Beznea wrote:
> Document Microchip OTP controller.
> 
> Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
> ---
>  .../nvmem/microchip-sama7g5,otpc.yaml         | 50 +++++++++++++++++++
>  .../nvmem/microchip-sama7g5,otpc.h            | 12 +++++
>  2 files changed, 62 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/nvmem/microchip-sama7g5,otpc.yaml

comma after vendor, dash after Soc, so:
microchip,sama7g5-otpc.yaml

Best regards,
Krzysztof
diff mbox series

Patch

diff --git a/Documentation/devicetree/bindings/nvmem/microchip-sama7g5,otpc.yaml b/Documentation/devicetree/bindings/nvmem/microchip-sama7g5,otpc.yaml
new file mode 100644
index 000000000000..e0cbdd8a47aa
--- /dev/null
+++ b/Documentation/devicetree/bindings/nvmem/microchip-sama7g5,otpc.yaml
@@ -0,0 +1,50 @@ 
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/nvmem/microchip-sama7g5,otpc.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Microchip SAMA7G5 OTP Controller (OTPC)
+
+maintainers:
+  - Claudiu Beznea <claudiu.beznea@microchip.com>
+
+description: |
+  OTP controller drives a NVMEM memory where system specific data
+  (e.g. calibration data for analog cells, hardware configuration
+  settings, chip identifiers) or user specific data could be stored.
+
+allOf:
+  - $ref: "nvmem.yaml#"
+
+properties:
+  compatible:
+    items:
+      - const: microchip,sama7g5-otpc
+      - const: syscon
+
+  reg:
+    maxItems: 1
+
+required:
+  - compatible
+  - reg
+
+unevaluatedProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/nvmem/microchip-sama7g5,otpc.h>
+
+    otpc: efuse@e8c00000 {
+        compatible = "microchip,sama7g5-otpc", "syscon";
+        reg = <0xe8c00000 0xec>;
+        #address-cells = <1>;
+        #size-cells = <1>;
+
+        temperature_calib: calib@1 {
+            reg = <OTP_PKT(1) 76>;
+        };
+    };
+
+...
diff --git a/include/dt-bindings/nvmem/microchip-sama7g5,otpc.h b/include/dt-bindings/nvmem/microchip-sama7g5,otpc.h
new file mode 100644
index 000000000000..f570b23165a2
--- /dev/null
+++ b/include/dt-bindings/nvmem/microchip-sama7g5,otpc.h
@@ -0,0 +1,12 @@ 
+/* SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause */
+
+#ifndef _DT_BINDINGS_NVMEM_MICROCHIP_OTPC_H
+#define _DT_BINDINGS_NVMEM_MICROCHIP_OTPC_H
+
+/*
+ * Need to have it as a multiple of 4 as NVMEM memory is registered with
+ * stride = 4.
+ */
+#define OTP_PKT(id)			((id) * 4)
+
+#endif