From patchwork Tue May 17 18:04:35 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kamal Dasu X-Patchwork-Id: 12852851 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 9709DC433EF for ; Tue, 17 May 2022 18:22:46 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:MIME-Version:List-Subscribe:List-Help: List-Post:List-Archive:List-Unsubscribe:List-Id:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=xy5XoM1lCK+VV7Z/QK7m1uo6hAJshrtLsHmqcFMxE6U=; b=IJW/U+ENsRv+0P 1vJgnooZGkPB+lxr4zH1+GUeNB7k7iuFPPFHxGXSWzLi71w7odhlQXkI5Igl9J2RtwzlAt9np6bvo poKhMZBq/QlcaZD9rNxTDj+KwTTRYa4fUO/ZKjzS48WDBZ825F9+pYcbNxayLlFXIyz5bl1YUzmHy L9bYwAnmyJIzk3rdzt8wAORjPnJhqNdRTryZRN2vEMbp/Z07l4KbARhqkgWnu7z7xR7yxLVyhjVm+ oQcXEbkOiMlhKD8yvQPPIdtI1NrTXTpYwkymPZFRsQVXdbCYMvhyX+r4+E7V2W8rURK0MAgwXbO0Y aaWu33c4K0eERTs4+c7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nr1pM-00FEDj-HW; Tue, 17 May 2022 18:21:48 +0000 Received: from mail-pj1-x1029.google.com ([2607:f8b0:4864:20::1029]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nr1pG-00FEAh-Q4 for linux-arm-kernel@lists.infradead.org; Tue, 17 May 2022 18:21:44 +0000 Received: by mail-pj1-x1029.google.com with SMTP id n10so18149863pjh.5 for ; Tue, 17 May 2022 11:21:40 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20210112; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=gfNE+jsBlh9BNefkHevdeU8gbP6/3y3vCQYKDZXj4Ys=; b=ismjAffrM0Q6B2lFKAcU5kHfnWHsoQtY0jH6z+mcWDjAQBM04jte2fmNn38AGxc6mw nOPlhtlueQajG9TQyq6Fo3GI3WMxmGFqrhBCT6lLCNylv4Xje9f3lfeRvpNHALNsdfzH ttYt/pqcrw4UNRpn51SDjvkrvCBiUyveVKMz6i3+8F5IR3GoZGAsJUOyQ/p/nAM4NrMf Klb/MQzk2rQhhXDHmpcxt2GKmOXurgyefNnF++bcoaPvFpv3DKTGUS6GIqUeUrFnuNK5 EcZHas7W/q53C8KngQkdnqeG+z0WYwdvkQnwFpcGJGxnLg0+LEb0ALTda+zw/fhdxpbr 9Ayg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=gfNE+jsBlh9BNefkHevdeU8gbP6/3y3vCQYKDZXj4Ys=; b=LOAwg73drNvIIvmIYvZiWaAKU9P45gNHQM2SvE38qGCFIVKAI4RQzquWvDom7HRpR6 nq2pBOCE0+nBwijqKFEjzuyY3XdLf7d59oQfNbvbxYszDg4hKp57hykaaEpjXONZZBtT LXGoIZUsroh2sUv6YXS1Xivp+9gfZJZl1JMqF0K8xcv41hWTj7kJtWMNfEk0AmZ5sVxH n8KObir2rrCH6pQvvTRUJgqycCbPn5qU65NKOPMoAW5XPekaTOUMkusTPL73ddJX4q+j t0dcH2/jjVaaVawcukoegK5PcDv2SmLESJrmct0ugVR7u3uLf3btOCuXgwjFP9zVUTL6 WOIQ== X-Gm-Message-State: AOAM530kxR0CsHGPL0s8eSuKtnyzgqyr99IbFskV7OPt9VCGCcditIMX xURuMxIkSLy6A8nQY1GqYrJuRyNmmo8= X-Google-Smtp-Source: ABdhPJwjAHkl3HBNbIqOh9aVEZVP0xLlvh1xSgh6JYuLlEEj7Kfs8DybX8TEuqKINe7y+BHall6l/Q== X-Received: by 2002:a17:903:240a:b0:14e:dad4:5ce4 with SMTP id e10-20020a170903240a00b0014edad45ce4mr24157104plo.125.1652811699765; Tue, 17 May 2022 11:21:39 -0700 (PDT) Received: from mail.broadcom.net ([192.19.11.250]) by smtp.gmail.com with ESMTPSA id 125-20020a630383000000b003f5e0c264bcsm837641pgd.66.2022.05.17.11.21.37 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 17 May 2022 11:21:39 -0700 (PDT) From: Kamal Dasu To: ulf.hansson@linaro.org, robh+dt@kernel.org, krzk+dt@kernel.org, alcooperx@gmail.com Cc: f.fainelli@gmail.com, bcm-kernel-feedback-list@broadcom.com, adrian.hunter@intel.com, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Kamal Dasu Subject: [PATCH v2 2/2] mmc: sdhci-brcmstb: Add ability to increase max clock rate for 72116b0 Date: Tue, 17 May 2022 14:04:35 -0400 Message-Id: <20220517180435.29940-3-kdasu.kdev@gmail.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220517180435.29940-1-kdasu.kdev@gmail.com> References: <20220517180435.29940-1-kdasu.kdev@gmail.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220517_112142_890004_7441178B X-CRM114-Status: GOOD ( 17.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Al Cooper The 72116B0 has improved SDIO controllers that allow the max clock rate to be increased from a max of 100MHz to a max of 150MHz. The driver will need to get the clock and increase it's default rate and override the caps register, that still indicates a max of 100MHz. The new clock will be named "sdio_freq" in the DT node's "clock-names" list. The driver will use a DT property, "max-frequency", to enable this functionality and will get the actual rate in MHz from the property to allow various speeds to be requested. Signed-off-by: Al Cooper Signed-off-by: Kamal Dasu --- drivers/mmc/host/sdhci-brcmstb.c | 28 ++++++++++++++++++++++++++++ 1 file changed, 28 insertions(+) diff --git a/drivers/mmc/host/sdhci-brcmstb.c b/drivers/mmc/host/sdhci-brcmstb.c index 8eb57de48e0c..bb614a5e1ea4 100644 --- a/drivers/mmc/host/sdhci-brcmstb.c +++ b/drivers/mmc/host/sdhci-brcmstb.c @@ -250,6 +250,8 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) struct sdhci_pltfm_host *pltfm_host; const struct of_device_id *match; struct sdhci_brcmstb_priv *priv; + struct clk *master_clk; + u32 actual_clock_mhz; struct sdhci_host *host; struct resource *iomem; struct clk *clk; @@ -330,6 +332,32 @@ static int sdhci_brcmstb_probe(struct platform_device *pdev) if (match_priv->flags & BRCMSTB_MATCH_FLAGS_BROKEN_TIMEOUT) host->quirks |= SDHCI_QUIRK_BROKEN_TIMEOUT_VAL; + /* Change the base clock frequency if the DT property exists */ + if (!(host->mmc->f_max)) + goto add_host; + + master_clk = devm_clk_get(&pdev->dev, "sdio_freq"); + if (IS_ERR(master_clk)) { + dev_warn(&pdev->dev, "Clock for \"sdio_freq\" not found\n"); + goto add_host; + } else { + res = clk_prepare_enable(master_clk); + if (res) + goto err; + } + + /* set improved clock rate */ + clk_set_rate(master_clk, host->mmc->f_max); + actual_clock_mhz = clk_get_rate(master_clk) / 1000000; + + host->caps &= ~SDHCI_CLOCK_V3_BASE_MASK; + host->caps |= (actual_clock_mhz << SDHCI_CLOCK_BASE_SHIFT); + /* Disable presets because they are now incorrect */ + host->quirks2 |= SDHCI_QUIRK2_PRESET_VALUE_BROKEN; + dev_dbg(&pdev->dev, "Base Clock Frequency changed to %dMHz\n", + actual_clock_mhz); + +add_host: res = sdhci_brcmstb_add_host(host, priv); if (res) goto err;