diff mbox series

arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board

Message ID 20220521150750.93718-1-marex@denx.de (mailing list archive)
State New, archived
Headers show
Series arm64: dts: imx8mm: Add SNVS LPGPR on MX8Menlo board | expand

Commit Message

Marek Vasut May 21, 2022, 3:07 p.m. UTC
Add SNVS LPGPR bindings on this system, the LPGPR is used to store
boot counter.

Signed-off-by: Marek Vasut <marex@denx.de>
Cc: Fabio Estevam <festevam@denx.de>
Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Cc: Peng Fan <peng.fan@nxp.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: Shawn Guo <shawnguo@kernel.org>
Cc: NXP Linux Team <linux-imx@nxp.com>
Cc: devicetree@vger.kernel.org
To: linux-arm-kernel@lists.infradead.org
---
NOTE: Depends on
      https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20
---
 arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Shawn Guo June 12, 2022, 12:30 a.m. UTC | #1
On Sat, May 21, 2022 at 05:07:50PM +0200, Marek Vasut wrote:
> Add SNVS LPGPR bindings on this system, the LPGPR is used to store
> boot counter.
> 
> Signed-off-by: Marek Vasut <marex@denx.de>
> Cc: Fabio Estevam <festevam@denx.de>
> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
> Cc: Peng Fan <peng.fan@nxp.com>
> Cc: Rob Herring <robh+dt@kernel.org>
> Cc: Shawn Guo <shawnguo@kernel.org>
> Cc: NXP Linux Team <linux-imx@nxp.com>
> Cc: devicetree@vger.kernel.org
> To: linux-arm-kernel@lists.infradead.org
> ---
> NOTE: Depends on
>       https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20
> ---
>  arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
> index 92eaf4ef45638..6956c9bb992be 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
> @@ -303,6 +303,12 @@ &sai2 {
>  	status = "disabled";
>  };
>  
> +&snvs {
> +	snvs-lpgpr {
> +		compatible = "fsl,imx7d-snvs-lpgpr";

Should we encode imx8mm specific compatible as well, while you added it
in the bindings?

Also this is a SoC rather than board device, so we may want to add it in
soc.dtsi instead?

Shawn

> +	};
> +};
> +
>  &uart1 {
>  	uart-has-rtscts;
>  	status = "okay";
> -- 
> 2.35.1
>
Marek Vasut June 12, 2022, 10:12 a.m. UTC | #2
On 6/12/22 02:30, Shawn Guo wrote:
> On Sat, May 21, 2022 at 05:07:50PM +0200, Marek Vasut wrote:
>> Add SNVS LPGPR bindings on this system, the LPGPR is used to store
>> boot counter.
>>
>> Signed-off-by: Marek Vasut <marex@denx.de>
>> Cc: Fabio Estevam <festevam@denx.de>
>> Cc: Marcel Ziswiler <marcel.ziswiler@toradex.com>
>> Cc: Peng Fan <peng.fan@nxp.com>
>> Cc: Rob Herring <robh+dt@kernel.org>
>> Cc: Shawn Guo <shawnguo@kernel.org>
>> Cc: NXP Linux Team <linux-imx@nxp.com>
>> Cc: devicetree@vger.kernel.org
>> To: linux-arm-kernel@lists.infradead.org
>> ---
>> NOTE: Depends on
>>        https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git/commit/?h=for-next&id=fee6de80bdd3df976a43f3092a165cb43c072f20
>> ---
>>   arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts | 6 ++++++
>>   1 file changed, 6 insertions(+)
>>
>> diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
>> index 92eaf4ef45638..6956c9bb992be 100644
>> --- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
>> +++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
>> @@ -303,6 +303,12 @@ &sai2 {
>>   	status = "disabled";
>>   };
>>   
>> +&snvs {
>> +	snvs-lpgpr {
>> +		compatible = "fsl,imx7d-snvs-lpgpr";
> 
> Should we encode imx8mm specific compatible as well, while you added it
> in the bindings?
> 
> Also this is a SoC rather than board device, so we may want to add it in
> soc.dtsi instead?

Right, this patch is already superseded by
[PATCH] arm64: dts: imx8mm: Add SNVS LPGPR
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
index 92eaf4ef45638..6956c9bb992be 100644
--- a/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mm-mx8menlo.dts
@@ -303,6 +303,12 @@  &sai2 {
 	status = "disabled";
 };
 
+&snvs {
+	snvs-lpgpr {
+		compatible = "fsl,imx7d-snvs-lpgpr";
+	};
+};
+
 &uart1 {
 	uart-has-rtscts;
 	status = "okay";