From patchwork Tue Jun 7 14:47:39 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kavyasree Kotagiri X-Patchwork-Id: 12872033 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24326C43334 for ; Tue, 7 Jun 2022 14:49:27 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TfCugKjyUV+/bWUIcftM94/fk7TL8RfnCjnMveYlXas=; b=Q/8j/880tCjjxZ oOJFTWbvGtlBBHgDf+u++XHKQ83pFqZJox/dRRcOPJasDgBhkSIwasQroIPktzg9LfHQp9XtwyVnC SjElKda1jI3XUFzob+8N7zdZFsJP+xTkWMYtpBhVaCF+kbS5HdukMJJWpVbjAEZXkIjgKIEhCGeL1 sLtPPktSM5GAC5k8Ufvx+xa2MuaotLLn8cmM2+oF9usMQFWsOcfkByWIZMAqaXV0QILHwtpAXx2oH WF9wDljClnsD8oDF/xhkAdgfIvpyaZR8+PMwr4ubzDNcN304ES56P5UCocoT6Y1ZrJzkzIh/hS8aJ sG4sjR4E3hVfguCRXNYw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nyaVF-0089ly-S9; Tue, 07 Jun 2022 14:48:17 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nyaUz-0089gy-A3 for linux-arm-kernel@lists.infradead.org; Tue, 07 Jun 2022 14:48:02 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1654613281; x=1686149281; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=BumBO/IsRtrUbJDzsCtef24MGXE+RwhQ8uH1bDcJSgY=; b=y6BvbSciNzjeY1Bwl0Dbu0x4CpTsU+0d7I+68XzLiRdNU90LOmxT22Ba kEXnYRvk5aNXGVSYCjch/5ivpzJOaNur5j/Fu502DP98F5Iu/R4bllgVF u4xLiONJOeVMB+xYAXmNM51blTM4LEskCRl1ex0rxh78L6QYmwRqo4HIW vMhTz/gL/T8sQAARDwKXTQBoMGGqj0MGP0n2dCXH/n1AbpXT6RnMMMIsF E5GW/ybtICl7RFkME0sOrsVS9zSe6iKvGQNL3Z8GbL4N0Q4B9Ytn6zCLx JiCBxk4fGffkx2dN2kUwG/7mv11jNInzullJP6tmMJZoZxRGNXk7SaY3Q A==; X-IronPort-AV: E=Sophos;i="5.91,284,1647327600"; d="scan'208";a="162250862" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 07 Jun 2022 07:48:00 -0700 Received: from chn-vm-ex02.mchp-main.com (10.10.85.144) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 7 Jun 2022 07:47:59 -0700 Received: from kavya-HP-Compaq-6000-Pro-SFF-PC.microchip.com (10.10.115.15) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 7 Jun 2022 07:47:56 -0700 From: Kavyasree Kotagiri To: , , , CC: , , , , Subject: [PATCH v2 2/3] dt-bindings: mfd: atmel,flexcom: Add new compatible string for lan966x Date: Tue, 7 Jun 2022 20:17:39 +0530 Message-ID: <20220607144740.14937-3-kavyasree.kotagiri@microchip.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220607144740.14937-1-kavyasree.kotagiri@microchip.com> References: <20220607144740.14937-1-kavyasree.kotagiri@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220607_074801_453925_43034439 X-CRM114-Status: GOOD ( 10.70 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org LAN966x SoC flexcoms has two optional I/O lines. Namely, CS0 and CS1 in flexcom SPI mode. CTS and RTS in flexcom USART mode. These pins can be mapped to lan966x FLEXCOM_SHARED[0-20] pins and usage depends on functions being configured. Signed-off-by: Kavyasree Kotagiri --- v1 -> v2: - Use allOf:if:then for lan966x dt properties .../bindings/mfd/atmel,flexcom.yaml | 39 ++++++++++++++++++- 1 file changed, 38 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml index 05cb6ebb4b2a..2d357217fe22 100644 --- a/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml +++ b/Documentation/devicetree/bindings/mfd/atmel,flexcom.yaml @@ -16,7 +16,9 @@ description: properties: compatible: - const: atmel,sama5d2-flexcom + enum: + - atmel,sama5d2-flexcom + - microchip,lan966x-flexcom reg: maxItems: 1 @@ -46,6 +48,27 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 enum: [1, 2, 3] + microchip,flx-shrd-pins: + description: Specify the Flexcom shared pins to be used for flexcom + chip-selects. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 2 + items: + minimum: 0 + maximum: 20 + + microchip,flx-cs: + description: Flexcom chip selects. Here, value of '0' represents "cts" line + of flexcom USART or "cs0" line of flexcom SPI and value of '1' represents + "rts" line of flexcom USART or "cs1" line of flexcom SPI. + $ref: /schemas/types.yaml#/definitions/uint32-array + minItems: 1 + maxItems: 2 + items: + minimum: 0 + maximum: 1 + patternProperties: "^serial@[0-9a-f]+$": description: See atmel-usart.txt for details of USART bindings. @@ -68,6 +91,18 @@ required: - ranges - atmel,flexcom-mode +allOf: + - if: + properties: + compatible: + contains: + const: microchip,lan966x-flexcom + + then: + required: + - microchip,flx-shrd-pins + - microchip,flx-cs + additionalProperties: false examples: @@ -80,6 +115,8 @@ examples: #size-cells = <1>; ranges = <0x0 0xf8034000 0x800>; atmel,flexcom-mode = <2>; + microchip,flx-shrd-pins = <9>; + microchip,flx-cs = <0>; spi0: spi@400 { compatible = "atmel,at91rm9200-spi";