From patchwork Fri Jun 10 09:24:08 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12877135 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id A6693CCA47E for ; Fri, 10 Jun 2022 09:24:47 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=DI8kZnUCj6cIdcFJ96/XuTF0Wrd74k7X9FZygwttvhQ=; b=AG+x7T3L3Fjmbe cF7mL/qf0EN6UglEeujfc4v5syav7yS9Aw0BkGMJlbEJG3h/TCJvxAPQnXmYiaABiXVIFoUz/Ryku N3tejWYHIFgau3E+EC1k/QrWxSUT8IFAZMJNEoXBUV49s+o9UPob+YU6LlO/7lWooMvYscj693pM1 qSuTbHZxOdGLFi13G3tTLRy/gVVyqpdetJj/YZQJHi4ifIXEBUA6qf7DGlFyZ7DxeZVGS7Mw1ivCK rWiIhuYTFi0gm+4qFz+DqTuKDP9bn7uLUrcvoGBezAbhguI+672r6tkBr3TSe86dI1g8fBHdRicS4 MOzWVe2wYyvVhmW60E2A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzarf-0077Qb-6f; Fri, 10 Jun 2022 09:23:35 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzaqc-0076z7-L8 for linux-arm-kernel@lists.infradead.org; Fri, 10 Jun 2022 09:22:32 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1654852951; x=1686388951; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=pW3FSQGIDTfSnLPnhufJ8V9RbufjCJBXkfyPvNp1q1M=; b=J26DiFt2xh7JxcQ8V4UEo85mdofjEEBOlJ/aGqw5JGzCn+IuCKo6Zdkg SBsBCYsNC/JLZWMsPwZCyLUNnP+LsUkdnxY0Ee6oiRj7r9YBzxxjGrboB 99AJgyyUvXg/y2SfIArWm/U8qSzckT/RSiX/i5AiXT4HQkB668CrGG01D 4uDz0diTtJ/9wV50WGFedlHqtIva0tMthA4u+iyzt/8CaxkKZxBQJIFFi TdK3vVglNybFMdGJY0uQsh5cl2db8rQn6ps6BLO34uXN9+u74J1Rf/uM+ SKLrDYDFQ0QGxYncdQwRTGfP8Fsg6Vbn/QIOS7TKTwuYFi1v9vpvuT5uY Q==; X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="159728328" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Jun 2022 02:22:30 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 10 Jun 2022 02:22:29 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 10 Jun 2022 02:22:25 -0700 From: Claudiu Beznea To: , , , , , CC: , , , , Claudiu Beznea , Rob Herring Subject: [PATCH v5 3/9] dt-bindings: reset: atmel,at91sam9260-reset: add sama7g5 bindings Date: Fri, 10 Jun 2022 12:24:08 +0300 Message-ID: <20220610092414.1816571-4-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220610092414.1816571-1-claudiu.beznea@microchip.com> References: <20220610092414.1816571-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220610_022230_816812_ED781D42 X-CRM114-Status: GOOD ( 10.18 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add documentation for SAMA7G5 reset controller. Compared with previous versions of reset controllers this one contains support for resetting in SoC devices (e.g. USB PHYs). Signed-off-by: Claudiu Beznea Reviewed-by: Rob Herring --- .../reset/atmel,at91sam9260-reset.yaml | 23 +++++++++++++++++-- 1 file changed, 21 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml index 34c40b875e20..98465d26949e 100644 --- a/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml +++ b/Documentation/devicetree/bindings/reset/atmel,at91sam9260-reset.yaml @@ -10,7 +10,8 @@ maintainers: - Claudiu Beznea description: | - The system reset controller can be used to reset the CPU. + The system reset controller can be used to reset the CPU. In case of + SAMA7G5 it can also reset some devices (e.g. USB PHYs). properties: compatible: @@ -21,21 +22,39 @@ properties: - atmel,at91sam9g45-rstc - atmel,sama5d3-rstc - microchip,sam9x60-rstc + - microchip,sama7g5-rstc - items: - const: atmel,sama5d3-rstc - const: atmel,at91sam9g45-rstc reg: - maxItems: 1 + minItems: 1 + items: + - description: base registers for system reset control + - description: registers for device specific reset control clocks: maxItems: 1 + "#reset-cells": + const: 1 + required: - compatible - reg - clocks +allOf: + - if: + properties: + compatible: + contains: + enum: + - microchip,sama7g5-rstc + then: + required: + - "#reset-cells" + additionalProperties: false examples: