From patchwork Fri Jun 10 09:24:10 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12877137 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E5FDEC433EF for ; Fri, 10 Jun 2022 09:26:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=TQj/Wh60SkD0ahA+PLzyEwgC/qijce+S2EwuJRhn3h4=; b=Qs/ZXqqnz8xFAj fBZfobYqEyIKH22ov0w981Q1ZFbeqQOMSOYvOOOO2F0F+aGdCoNo3XgXJsCk3FfC1bgFntk1Bavcv QfCVgf1KDDc5VDTgv2Z9qae0dNMezd+ipxsUW6aKTrhhP0G+avGyO1wTxVyJHOxxWWfqTrKGuIjIA lCP3xQ5Hq+3XcfyoRjmVkvh0rHuF9lvFe9FcyhDDXobAWEhlc9b89FGJf2cW/kbHKaMKG5+29R6gD noTdLGBh7USF6PBXo6nSU2Q8roTm97U4PVyQKzMuJyz2rMGtkNSHK4aBya+C9w+rcKGF/Z4CMNFPO sgrOGnKwd9sxcWtj/C0Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzatA-0078Iu-Lo; Fri, 10 Jun 2022 09:25:09 +0000 Received: from esa.microchip.iphmx.com ([68.232.153.233]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1nzaqm-007740-0o for linux-arm-kernel@lists.infradead.org; Fri, 10 Jun 2022 09:22:41 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1654852959; x=1686388959; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=+dZc0gifx3eXpEvvP3X4N/xmhmZHzFzFCFCzlAUX3uM=; b=SfsDe5G4yRD5RJuwcsapvvekSjkekXkCkPhXwqkANN5gFcumYnxumh+N rE48jokGU0hDWUfSs8thRGg3x+0NKtcymHpqhkbjqU/DCSdxP1I70szZW QRqeeVx1IHbJIKJ32lYhYx++UNiTcBrMZzE5Kk1YAypSXQ5UsHWJ6J9rT GwixOVLp1Cic8P3FpgHmgX7g2NsNhJgYxMpXgj5wVFBRN7V3Bu1IpJYHz 5qGQBIEbZ8cc/Z9NTimMm+Lg1KoLC/z1A3qn/MItPM7rmkJAjaGMetivm bbGn3W1RErm3f+y5bV2Ihi+IV8I7FZ7dyUNMCv0HYOlmu/FmaHWPuHUCp Q==; X-IronPort-AV: E=Sophos;i="5.91,288,1647327600"; d="scan'208";a="177391127" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Jun 2022 02:22:39 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Fri, 10 Jun 2022 02:22:38 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Fri, 10 Jun 2022 02:22:34 -0700 From: Claudiu Beznea To: , , , , , CC: , , , , Claudiu Beznea Subject: [PATCH v5 5/9] power: reset: at91-reset: document structures and enums Date: Fri, 10 Jun 2022 12:24:10 +0300 Message-ID: <20220610092414.1816571-6-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220610092414.1816571-1-claudiu.beznea@microchip.com> References: <20220610092414.1816571-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220610_022240_147342_ADC147FA X-CRM114-Status: UNSURE ( 7.76 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Document structures and enums. Signed-off-by: Claudiu Beznea --- drivers/power/reset/at91-reset.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/drivers/power/reset/at91-reset.c b/drivers/power/reset/at91-reset.c index 64def79d557a..e62798750b6b 100644 --- a/drivers/power/reset/at91-reset.c +++ b/drivers/power/reset/at91-reset.c @@ -39,6 +39,17 @@ #define AT91_RSTC_URSTIEN BIT(4) /* User Reset Interrupt Enable */ #define AT91_RSTC_ERSTL GENMASK(11, 8) /* External Reset Length */ +/** + * enum reset_type - reset types + * @RESET_TYPE_GENERAL: first power-up reset + * @RESET_TYPE_WAKEUP: return from backup mode + * @RESET_TYPE_WATCHDOG: watchdog fault + * @RESET_TYPE_SOFTWARE: processor reset required by software + * @RESET_TYPE_USER: NRST pin detected low + * @RESET_TYPE_CPU_FAIL: CPU clock failure detection + * @RESET_TYPE_XTAL_FAIL: 32KHz crystal failure dectection fault + * @RESET_TYPE_ULP2: ULP2 reset + */ enum reset_type { RESET_TYPE_GENERAL = 0, RESET_TYPE_WAKEUP = 1, @@ -50,6 +61,15 @@ enum reset_type { RESET_TYPE_ULP2 = 8, }; +/** + * struct at91_reset - AT91 reset specific data structure + * @rstc_base: base address for system reset + * @ramc_base: array with base addresses of RAM controllers + * @sclk: slow clock + * @nb: reset notifier block + * @args: SoC specific system reset arguments + * @ramc_lpr: SDRAM Controller Low Power Register + */ struct at91_reset { void __iomem *rstc_base; void __iomem *ramc_base[2];