Message ID | 20220610175655.776153-5-colin.foster@in-advantage.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show
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Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Lars Povlsen <lars.povlsen@microchip.com>, Steen Hegelund <Steen.Hegelund@microchip.com>, UNGLinuxDriver@microchip.com, Linus Walleij <linus.walleij@linaro.org>, Wolfram Sang <wsa@kernel.org>, Terry Bowman <terry.bowman@amd.com>, Andy Shevchenko <andy.shevchenko@gmail.com> Subject: [PATCH v9 net-next 4/7] pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration Date: Fri, 10 Jun 2022 10:56:52 -0700 Message-Id: <20220610175655.776153-5-colin.foster@in-advantage.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610175655.776153-1-colin.foster@in-advantage.com> References: <20220610175655.776153-1-colin.foster@in-advantage.com> X-ClientProxiedBy: MWHPR19CA0070.namprd19.prod.outlook.com (2603:10b6:300:94::32) To MWHPR1001MB2351.namprd10.prod.outlook.com (2603:10b6:301:35::37) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 33cd7c9f-960e-471c-5336-08da4b0aa2f6 X-MS-TrafficTypeDiagnostic: DM6PR10MB3356:EE_ X-Microsoft-Antispam-PRVS: <DM6PR10MB33565B95197749BA18542DF1A4A69@DM6PR10MB3356.namprd10.prod.outlook.com> X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" <linux-arm-kernel-bounces@lists.infradead.org> Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org |
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add support for VSC7512 control over SPI
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expand
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diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c index 6f55bf7d5e05..25fe57a0c26e 100644 --- a/drivers/pinctrl/pinctrl-microchip-sgpio.c +++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c @@ -12,6 +12,7 @@ #include <linux/clk.h> #include <linux/gpio/driver.h> #include <linux/io.h> +#include <linux/mfd/ocelot.h> #include <linux/mod_devicetable.h> #include <linux/module.h> #include <linux/pinctrl/pinmux.h> @@ -904,7 +905,6 @@ static int microchip_sgpio_probe(struct platform_device *pdev) struct reset_control *reset; struct sgpio_priv *priv; struct clk *clk; - u32 __iomem *regs; u32 val; struct regmap_config regmap_config = { .reg_bits = 32, @@ -937,11 +937,8 @@ static int microchip_sgpio_probe(struct platform_device *pdev) return -EINVAL; } - regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(regs)) - return PTR_ERR(regs); - - priv->regs = devm_regmap_init_mmio(dev, regs, ®map_config); + ocelot_platform_init_regmap_from_resource(pdev, 0, &priv->regs, NULL, + ®map_config); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs);
There are a few Ocelot chips that can contain SGPIO logic, but can be controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped. Add support for these non-memory-mapped configurations. Signed-off-by: Colin Foster <colin.foster@in-advantage.com> --- drivers/pinctrl/pinctrl-microchip-sgpio.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-)