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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , Steen Hegelund , UNGLinuxDriver@microchip.com, Linus Walleij , Wolfram Sang , Terry Bowman , Andy Shevchenko Subject: [PATCH v9 net-next 4/7] pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration Date: Fri, 10 Jun 2022 10:56:52 -0700 Message-Id: <20220610175655.776153-5-colin.foster@in-advantage.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610175655.776153-1-colin.foster@in-advantage.com> References: <20220610175655.776153-1-colin.foster@in-advantage.com> X-ClientProxiedBy: MWHPR19CA0070.namprd19.prod.outlook.com (2603:10b6:300:94::32) To MWHPR1001MB2351.namprd10.prod.outlook.com (2603:10b6:301:35::37) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 33cd7c9f-960e-471c-5336-08da4b0aa2f6 X-MS-TrafficTypeDiagnostic: DM6PR10MB3356:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: NtKH7vyOR6OjMUT0bRzI9iRDUo7v7SFHSMF91ZapKL836Xn9ui/VHeuf1wQDE/XXcxgEGAu2lzQODVoKBFuE9AG9dfn35NsCf6++bRPMDrFsVz2xeZwjjlRc2a91UXAt7BTqj5zqUUY7vYN5bA7rYkUk5410188Z+d7dWltg1kgo7IKT3pWPlZi/VAkBfDfiSyxpFqa/fdhIsM4g0boiGnplF1YrKXYUjm3gVyG2UhKUgvbo+CL/wSU2SCVWzzRLR25VjJ4/0GsVIw6svKgDylfvQ5f9oWZHpBQiH2KN66Onl7CsMcK0yHMjM6qw/QI79K1JPQzTFo7XivBZo0tdtN3CXlNr3LP9iiMhkvTXxmu6Ki7Rf/YTT6srhx2Xqp9Jh3dfosNNYrGZbVTRnQ+xkpXUIu+Y4kSs1WIckvjrRqBnpst17fASOJmxPPgKirbZsxdsteya8tXcafxbQ8eF/tSJ9rgPi3IGEApbpjX4W703C09TTT8+ZSQjDMrBnN5wRvH0RJTtYYFdQWgIvLsxv8wPBD/UJnuyG3/prDE7wlNjKeN3jJBn74PP6aQwdyZRi6I2nEvYmCCWg37WhUsudVqoFzaxabV59WoeAvkSrxBHKoYHFVyNoKkCt3isLHazzwTA7E3d3jDOAAX2cwCJELlUdOXEeUa0QftJjWVJ8Ce7wLFYwX5o5rU9Q+OLs+3Xdv5xr8mYW+J9WpR3U+0TJnKU+bQutbj/SE/Xyy6cD5JUjxwqG3d/FGewjsDTTh/XeiWNtOIO9oHIvN1zuPnh4+09xR+0hhVZfbFaHoOckPN0jW9hFHorZqPxQKsFib1HeHETzf8lw8QtxGDvU5dseR4Krb0bdiq+nrWUYCbzNSUxF0Rbij/Y0YcUOrRdnExB9R4kDfaa07Nl9XFYex86JqoeRVPVhKdMUTOM1prMpTZVsh6sGfMf678mYpFZ3uRdqHJzYoPWikNdjqmn8t4IUabWLtJxHYJKiFdMAqxS0hhUfq/xSTTtsxhm9VmiF+9HLDOe1ZVDNX/mn1btQ4ufewNyDXG0rW5EUU81aexweh3D8rqGqcjMEo38VujhSYptz5iGAGF+WBfYoE/e65YrK3CD4oMASubKAjSlVtoyI+/1clLSgPqeiRaatVWczFJv+ccppTD1eiwo/EIaiHecIRCKDOkTQlQr6X6kEAzvgWr4zKix/Y49ysoOOHw7jbdxPF7Sen0q7uHC7tsmwZLHY3fheoHWt/eP7sCssaFYKhMwvZTNJJEI3o9UpVE++3l6XjdE7JJKhcQ+Lq08ukLFPvaoL6W0qO1bw+KVcJRBdwZIlQpEB9H2sq3Kyf/vI3HTDELKsC5awZ2di0yjBGtBe/zdY8SHsXOahYpQ4wejBOgQv4nKQwmzD3HIP5zIrR4YxFm/S9rGSvuLawRBP9o6WVukoYxZkQR5jR/cYJVG1KeKK1+Vr7UiHtOA7YXDglnAUmBpfmbBgOdU/+ciss8l65zrbm+Oan283oVtUiDiWCIF9wxPhqLn0ZF7VTfask7OT1NYlVdCAjzLYr9vdjfRhUeY+Cu6GaEpgGF/79bmkeVMGpxgp6ju/YF/jwhvelOZ/yKUBcGoLwolvTBODe0/+VvMJ9GyLRe8XYRzU2hRhVdHRsVaHkKhmgtmgB+kuo3somRgcncaJl8ue3dhwL8AkNWs8sMO42J5sHz3yB/6Gv+gUzX6DS0rgukLGf4yQ/uvAKFPpfywTowAX8LaJeFKOFWctoptW3hO6uiTDs9Krx0q0ggkWe9nz6eUw2rcy2VC X-OriginatorOrg: in-advantage.com X-MS-Exchange-CrossTenant-Network-Message-Id: 33cd7c9f-960e-471c-5336-08da4b0aa2f6 X-MS-Exchange-CrossTenant-AuthSource: MWHPR1001MB2351.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Jun 2022 17:57:08.4967 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 48e842ca-fbd8-4633-a79d-0c955a7d3aae X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 7yAc734C0BsIgdymLflxeJkCSHV2Q+mGNYpZYJ24fHIpIN/wwf9ukqqPaj8ODKbFK932l9YgG5jeIGft0OaHp63VwRYpt2WLSMcJErXItKk= X-MS-Exchange-Transport-CrossTenantHeadersStamped: DM6PR10MB3356 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220610_105716_021512_9F3D04CB X-CRM114-Status: GOOD ( 14.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There are a few Ocelot chips that can contain SGPIO logic, but can be controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped. Add support for these non-memory-mapped configurations. Signed-off-by: Colin Foster --- drivers/pinctrl/pinctrl-microchip-sgpio.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c index 6f55bf7d5e05..25fe57a0c26e 100644 --- a/drivers/pinctrl/pinctrl-microchip-sgpio.c +++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -904,7 +905,6 @@ static int microchip_sgpio_probe(struct platform_device *pdev) struct reset_control *reset; struct sgpio_priv *priv; struct clk *clk; - u32 __iomem *regs; u32 val; struct regmap_config regmap_config = { .reg_bits = 32, @@ -937,11 +937,8 @@ static int microchip_sgpio_probe(struct platform_device *pdev) return -EINVAL; } - regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(regs)) - return PTR_ERR(regs); - - priv->regs = devm_regmap_init_mmio(dev, regs, ®map_config); + ocelot_platform_init_regmap_from_resource(pdev, 0, &priv->regs, NULL, + ®map_config); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs);