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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lars Povlsen , Steen Hegelund , UNGLinuxDriver@microchip.com, Linus Walleij , Wolfram Sang , Terry Bowman , Andy Shevchenko Subject: [PATCH v10 net-next 4/7] pinctrl: microchip-sgpio: add ability to be used in a non-mmio configuration Date: Fri, 10 Jun 2022 13:23:27 -0700 Message-Id: <20220610202330.799510-5-colin.foster@in-advantage.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220610202330.799510-1-colin.foster@in-advantage.com> References: <20220610202330.799510-1-colin.foster@in-advantage.com> X-ClientProxiedBy: MW4PR04CA0246.namprd04.prod.outlook.com (2603:10b6:303:88::11) To MWHPR1001MB2351.namprd10.prod.outlook.com (2603:10b6:301:35::37) MIME-Version: 1.0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: 86cc6a30-447d-42b1-f675-08da4b1f205d X-MS-TrafficTypeDiagnostic: MWHPR10MB1629:EE_ X-Microsoft-Antispam-PRVS: X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: 5FKofilow+BUxlGaq/p+vuh3MasfmAMEClKF3ZgwDPdxbZQEcWEK/X+sS/0nt5Pal+BZfVt2QH3cjrF/2ExR13TR7eeRn0MCEHyo/eAcCAAXgPqGPJ91hlBmpR5pvgEjlv7qGwSmxCeHelhvJ+uAXVBB7+GreFfCviViabrehjdFCcQc1T23nHaDmdVm1wJ2wzi2tjsJ1oWHqaEkJbGUbXKRpraMmdMPbSShOirEq4LjBT2ygrywntFDXFB/4QDiaqQJk6nT7wfwT4MtxwXSvODSo665YW9Brj7UmskjSQQtUL1dFQyu+SkSxgO9I9hWVwh738doNcDn4OMAqWCDGR1UP13prDLwynOxeCDF4LpuTR1e8zVrc+MMXoVz17dYBYTAD7iYfyf2df94J3lxb4B40aOlchk+wf/TDK+biNe8Pvd41I83Ux1PVa1c9Rj5Dcomq/GA01QKXVEhnxNVNbhSN3/ef9TdCRrg/taHuaRkCgT8T/BZg447iffveIUpjZelnVMIpZN+67LcWE02DL8y3E9m/34FJsdSFsGJFtL0LHApQybbeKRfr5HYFny4P4IAFa1yNij/lmc4Vac1DcL1VCps0ZURVZCuyHZkZ7A7cYhS9wKUBs1UBcVXn3Qtv+A6CR0CS2cCWtVVsmQPi1nKHRd9BWI+lI1ujwCKzv65nzI5IwOGLtKFBDA6bA/a+HwGk8Rgvo96XBAiyF/YL1mC4pzHve6Lpm5NO+1+8Cf3QXfqUpatAmbhagUuRzrFVXSEWH68sog0hXItGSM8ysmvL2tJwbugBCcbLj6tuNKn9MXme5whzOUZ2DsWF6ZkoFVXlzPqUPuBZwLfE55TkCOMaPR65gwHWTbNTtVh4X5akeEgztAlmUym1SiqV6JZ9/NY8cQQ6ijDplORqmC1dVG37bQ5Hr4IgGHMZxAAsozoK8+Zmyxr8q7EpdeZ4hkxJne9s7iajx02oKyVgk9Ifan1XdTvcex66VKF0lzKjLbcHzBR+ajOQoAuYD8BUpdKpRSaBim/EO6jwatA7Yr/6ZhrrvyEQSOFfJ5co1Rcp+fGn55+c7KwrbBXwrVrVBl2K6Wse49ar/hD23HmtrIFvEADu+TMy0lpmdWVz73g04h9Pu6mE7I2eSdTVD7Qg2VoMOQhw2KLFrqkDUXSDdgdfwN/BU59gwXd5vUt9z+zM/3eb6pmf8jnZ6MCN79heKqriz/oQhswOmkDFQy3BXEKvFOtaPcTz9plYnyZd9c2epzpB4DZqHAMmRJHOecS5t96m9W4Y4pHTfpTuOeQhiUG0t2AF2MxHzW1cuuEFx6cGCH8GUFOQA0A2pz3q2AdAArrEmqINFQkH5Cp3k0z04oHq89pd2Fd7L+w34/QiIQzF+S0l6gzYcpzutEWJmBYSWGqHLx1OxORmDAN1pkpcyuBgdwt+zjH70lVAs+C+Z1aUVsN4yu8XbcTZizF+QH+uicLpI+0dNHhJ/TBd00Lo8omuIKv2YngBjJ0D79EuhWRXfnPpaTPqIyW/XJ9qCyPW8UfGXyxgBgL36uTPFZc1sn0EXYJu/nBuo05p+yKvseV9MLM5eGK2ofu5n1DqvDXK2jvSSxPBuKKh5leiOnrNE2toiHui3l84vSfbX/wT8qGNl/J6uNxm0NuBjeVAMCRJqR+4eK39ORfVyN+17nipJdgpaNJHWVbIGn4BSuYmLeOSvtpkYif591OShthVlYsT0sHiniHL3FVmcMw1CBMD40ZSAD/wD+YEKG9ET3F703RFwDpyAs0pyT7Tm5hGCowqMTT X-OriginatorOrg: in-advantage.com X-MS-Exchange-CrossTenant-Network-Message-Id: 86cc6a30-447d-42b1-f675-08da4b1f205d X-MS-Exchange-CrossTenant-AuthSource: MWHPR1001MB2351.namprd10.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Internal X-MS-Exchange-CrossTenant-OriginalArrivalTime: 10 Jun 2022 20:23:48.7788 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 48e842ca-fbd8-4633-a79d-0c955a7d3aae X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 8aDeXPntdFJRRrRX+SJ+yMUENjVQqyxSrZOrOgzzcrmDSd2d5feab1qHnujORMzowRQ24ZBeP2roYWfNTw/4lfNaV+mvrnkS8BbibeFsVa0= X-MS-Exchange-Transport-CrossTenantHeadersStamped: MWHPR10MB1629 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220610_132357_013284_BC4ACA97 X-CRM114-Status: GOOD ( 14.63 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org There are a few Ocelot chips that can contain SGPIO logic, but can be controlled externally. Specifically the VSC7511, 7512, 7513, and 7514. In the externally controlled configurations these registers are not memory-mapped. Add support for these non-memory-mapped configurations. Signed-off-by: Colin Foster --- drivers/pinctrl/pinctrl-microchip-sgpio.c | 9 +++------ 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/pinctrl/pinctrl-microchip-sgpio.c b/drivers/pinctrl/pinctrl-microchip-sgpio.c index 6f55bf7d5e05..25fe57a0c26e 100644 --- a/drivers/pinctrl/pinctrl-microchip-sgpio.c +++ b/drivers/pinctrl/pinctrl-microchip-sgpio.c @@ -12,6 +12,7 @@ #include #include #include +#include #include #include #include @@ -904,7 +905,6 @@ static int microchip_sgpio_probe(struct platform_device *pdev) struct reset_control *reset; struct sgpio_priv *priv; struct clk *clk; - u32 __iomem *regs; u32 val; struct regmap_config regmap_config = { .reg_bits = 32, @@ -937,11 +937,8 @@ static int microchip_sgpio_probe(struct platform_device *pdev) return -EINVAL; } - regs = devm_platform_ioremap_resource(pdev, 0); - if (IS_ERR(regs)) - return PTR_ERR(regs); - - priv->regs = devm_regmap_init_mmio(dev, regs, ®map_config); + ocelot_platform_init_regmap_from_resource(pdev, 0, &priv->regs, NULL, + ®map_config); if (IS_ERR(priv->regs)) return PTR_ERR(priv->regs);