From patchwork Fri Jun 24 15:06:32 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 12894740 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DBD33CCA473 for ; Fri, 24 Jun 2022 15:08:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=WGmaxUteM7OW2o/MVwnVSWGOtLA9vNY8Nfsq2BlJVZs=; b=pljHbir7k8ldXu /ekk99ndxAuOtx++vdrWUdkXTh8RyK3pi/u1znmnBkiawtieOnx7HZJ1vMb1dyGsPHhWf+SSybKDT +O/EiYrM+EIGeGE8piqYuWkIl7rmFOTjQ40SzH2puWGzVUTvvfriqKMSg8Jhn7ZRmuD8KIID331J/ mtIP3de/gED4GhXW1ofzvDUVwNAAyCY2tb5mwDR5jnfbreJvbN6Q0PSDB36eJey/3K9RSyINcFnP9 bW0lRz8kFcALOGCHgDvgFYLluZxp6i6LbnqQBDnJOb1RyqMmPN7j6zrBpH4V2c8T41FnRCs6q0RR0 6pGbANlOd8W1y6h+jriw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4kuC-002iQH-8z; Fri, 24 Jun 2022 15:07:32 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o4ktw-002iKu-Mc for linux-arm-kernel@lists.infradead.org; Fri, 24 Jun 2022 15:07:18 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 5EE23B82904; Fri, 24 Jun 2022 15:07:15 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39241C341C0; Fri, 24 Jun 2022 15:07:12 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656083234; bh=Nlk+fT8XE7NfZPpFGoVniozAoA3n+KamLs/q34Zdfco=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=olZLEfDmcVxWnhG2ubBfJT1q5jqDVxE4f2GflVogBCx8qgVcMDAtstfi9jun1mDS9 NVKVtaXAiSrgpWxaq80QZSK0sizoVvBoWV//N0N9/s6pbEyM/bv4fvHTscen1/uWvV 1TIBQIg5/06NEkm+i2ujag/xNyjKkn5Nv81mCz9gdVjmHuDFM9a33IW3AlS9BL3+6D N8Z2G8TaZd9GFeXEZpf1uhbCeDgcTr2qsTYVKaFEIIkAlFkRcU7ewuy6QjtftOwJkX 9vdp5YiLd2a5R2dsAa6ugmdyCsFY7mG9KQAwFSuJpW3PHCN8atYqSFjuVTh/yG3H/Y vZTyhZr+0mvhQ== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Marc Zyngier , Will Deacon , Mark Rutland , Kees Cook , Catalin Marinas , Mark Brown , Anshuman Khandual Subject: [PATCH v5 02/21] arm64: mm: make vabits_actual a build time constant if possible Date: Fri, 24 Jun 2022 17:06:32 +0200 Message-Id: <20220624150651.1358849-3-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220624150651.1358849-1-ardb@kernel.org> References: <20220624150651.1358849-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=3484; h=from:subject; bh=Nlk+fT8XE7NfZPpFGoVniozAoA3n+KamLs/q34Zdfco=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBitdLqOSnUNh+BMv8XNf4z00iv3rDH1Ne05woz9euk 4XRbTxWJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYrXS6gAKCRDDTyI5ktmPJDkeDA CyQaz6IrPejb0D9yjtDw395AGVUV9zV+ZzA0qguQ72ZDUP8LGM5PG5U1Ml+4NLVnPirR8cWcMVJ1ep VWienPHGpq8YxbltxCD+74nr+9/2ESyCCBzTCFntbsOezniGn6L1kzQPiRvTGvFGPJT839bwfc/Vwn c+bxvSOKsu0QhhKIsBMT8RFmDejgd5coMoabAsWwng14czYXVp1WmMXdiov2UvRInwsDPzvYSdfD9v /QfaANG6ld8k77PqVaf50n30RS0QHcj1yRnN/7XfGphHiQ8yWKbfYa8wXkUAeFvo7i6LoPlcRJcmuD mLXv6g60C0Xz6U9pnNSyEGujy13HlI6CPMKUTtsCWvxZwmji3lXo3so/3tuXIVBczDXZ8VdOQGMRe3 p8U/W6I9gacJmQvG3ADrGnO48/wW41441IGOfp1biSd7zSscmzK2FzWY2mi1AcGzjF8tjtfU0BFYSs BxFWEmbpBwusR1EN+V2o8SF0vO98TcF2SdwX8Jfk+3cXM= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220624_080717_095635_FFB5EFFA X-CRM114-Status: GOOD ( 15.21 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Currently, we only support 52-bit virtual addressing on 64k pages configurations, and in all other cases, vabits_actual is guaranteed to equal VA_BITS (== VA_BITS_MIN). So get rid of the variable entirely in that case. While at it, move the assignment out of the asm entry code - it has no need to be there. Signed-off-by: Ard Biesheuvel --- arch/arm64/include/asm/memory.h | 4 ++++ arch/arm64/kernel/head.S | 15 +-------------- arch/arm64/mm/init.c | 15 ++++++++++++++- arch/arm64/mm/mmu.c | 4 +++- 4 files changed, 22 insertions(+), 16 deletions(-) diff --git a/arch/arm64/include/asm/memory.h b/arch/arm64/include/asm/memory.h index 0af70d9abede..c751cd9b94f8 100644 --- a/arch/arm64/include/asm/memory.h +++ b/arch/arm64/include/asm/memory.h @@ -174,7 +174,11 @@ #include #include +#if VA_BITS > 48 extern u64 vabits_actual; +#else +#define vabits_actual ((u64)VA_BITS) +#endif extern s64 memstart_addr; /* PHYS_OFFSET - the physical address of the start of memory. */ diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 1cdecce552bb..dc07858eb673 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -293,19 +293,6 @@ SYM_FUNC_START_LOCAL(__create_page_tables) adrp x0, idmap_pg_dir adrp x3, __idmap_text_start // __pa(__idmap_text_start) -#ifdef CONFIG_ARM64_VA_BITS_52 - mrs_s x6, SYS_ID_AA64MMFR2_EL1 - and x6, x6, #(0xf << ID_AA64MMFR2_LVA_SHIFT) - mov x5, #52 - cbnz x6, 1f -#endif - mov x5, #VA_BITS_MIN -1: - adr_l x6, vabits_actual - str x5, [x6] - dmb sy - dc ivac, x6 // Invalidate potentially stale cache line - /* * VA_BITS may be too small to allow for an ID mapping to be created * that covers system RAM if that is located sufficiently high in the @@ -713,7 +700,7 @@ SYM_FUNC_START(__enable_mmu) SYM_FUNC_END(__enable_mmu) SYM_FUNC_START(__cpu_secondary_check52bitva) -#ifdef CONFIG_ARM64_VA_BITS_52 +#if VA_BITS > 48 ldr_l x0, vabits_actual cmp x0, #52 b.ne 2f diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c index 339ee84e5a61..1faa6760895e 100644 --- a/arch/arm64/mm/init.c +++ b/arch/arm64/mm/init.c @@ -265,7 +265,20 @@ early_param("mem", early_mem); void __init arm64_memblock_init(void) { - s64 linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual); + s64 linear_region_size; + +#if VA_BITS > 48 + if (cpuid_feature_extract_unsigned_field( + read_sysreg_s(SYS_ID_AA64MMFR2_EL1), + ID_AA64MMFR2_LVA_SHIFT)) + vabits_actual = VA_BITS; + + /* make the variable visible to secondaries with the MMU off */ + dcache_clean_inval_poc((u64)&vabits_actual, + (u64)&vabits_actual + sizeof(vabits_actual)); +#endif + + linear_region_size = PAGE_END - _PAGE_OFFSET(vabits_actual); /* * Corner case: 52-bit VA capable systems running KVM in nVHE mode may diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c index 7148928e3932..a6392656d589 100644 --- a/arch/arm64/mm/mmu.c +++ b/arch/arm64/mm/mmu.c @@ -46,8 +46,10 @@ u64 idmap_t0sz = TCR_T0SZ(VA_BITS_MIN); u64 idmap_ptrs_per_pgd = PTRS_PER_PGD; -u64 __section(".mmuoff.data.write") vabits_actual; +#if VA_BITS > 48 +u64 vabits_actual __ro_after_init = VA_BITS_MIN; EXPORT_SYMBOL(vabits_actual); +#endif u64 kimage_vaddr __ro_after_init = (u64)&_text; EXPORT_SYMBOL(kimage_vaddr);