Message ID | 20220627064707.138883-6-chanho61.park@samsung.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [1/5] spi: spi-s3c64xx: increase MAX_SPI_PORTS to 12 | expand |
On 27/06/2022 08:47, Chanho Park wrote: > Add exynosautov9 spi port configuration. It supports up to 12 spis and > has DIV_4 as the default internal clock divider. The spi also has > an internal loopback mode to run a loopback test. > > Signed-off-by: Chanho Park <chanho61.park@samsung.com> > --- > drivers/spi/spi-s3c64xx.c | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > > diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c > index dd5fc8570bce..67b1fecf6fc6 100644 > --- a/drivers/spi/spi-s3c64xx.c > +++ b/drivers/spi/spi-s3c64xx.c > @@ -1447,6 +1447,19 @@ static const struct s3c64xx_spi_port_config exynos5433_spi_port_config = { > .quirks = S3C64XX_SPI_QUIRK_CS_AUTO, > }; > > +static struct s3c64xx_spi_port_config exynosautov9_spi_port_config = { This should be const. Best regards, Krzysztof
diff --git a/drivers/spi/spi-s3c64xx.c b/drivers/spi/spi-s3c64xx.c index dd5fc8570bce..67b1fecf6fc6 100644 --- a/drivers/spi/spi-s3c64xx.c +++ b/drivers/spi/spi-s3c64xx.c @@ -1447,6 +1447,19 @@ static const struct s3c64xx_spi_port_config exynos5433_spi_port_config = { .quirks = S3C64XX_SPI_QUIRK_CS_AUTO, }; +static struct s3c64xx_spi_port_config exynosautov9_spi_port_config = { + .fifo_lvl_mask = { 0x1ff, 0x1ff, 0x7f, 0x7f, 0x7f, 0x7f, 0x1ff, 0x7f, + 0x7f, 0x7f, 0x7f, 0x7f}, + .rx_lvl_offset = 15, + .tx_st_done = 25, + .high_speed = true, + .clk_from_cmu = true, + .clk_ioclk = true, + .clk_div = 4, + .has_loopback = true, + .quirks = S3C64XX_SPI_QUIRK_CS_AUTO, +}; + static struct s3c64xx_spi_port_config fsd_spi_port_config = { .fifo_lvl_mask = { 0x7f, 0x7f, 0x7f, 0x7f, 0x7f}, .rx_lvl_offset = 15, @@ -1487,6 +1500,9 @@ static const struct of_device_id s3c64xx_spi_dt_match[] = { { .compatible = "samsung,exynos5433-spi", .data = (void *)&exynos5433_spi_port_config, }, + { .compatible = "samsung,exynosautov9-spi", + .data = (void *)&exynosautov9_spi_port_config, + }, { .compatible = "tesla,fsd-spi", .data = (void *)&fsd_spi_port_config, },
Add exynosautov9 spi port configuration. It supports up to 12 spis and has DIV_4 as the default internal clock divider. The spi also has an internal loopback mode to run a loopback test. Signed-off-by: Chanho Park <chanho61.park@samsung.com> --- drivers/spi/spi-s3c64xx.c | 16 ++++++++++++++++ 1 file changed, 16 insertions(+)