From patchwork Mon Jun 27 15:14:07 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Marc Zyngier X-Patchwork-Id: 12896750 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B1009C433EF for ; Mon, 27 Jun 2022 15:15:50 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=M7qiyyS2HAixSXHaBsEzpOqdSw0es50tLLBrNk8Y1i0=; b=tqYwGuUvIcyfWG VEuP6aACn51EPlVU4mCXrqtOpVt8hWqnyNA+fj4pcwUfXDxMl9KwbqXIYcuvfsWnSmz7FlPGBKSnd G62xYYQj34af4AKv+NCOc6dAOhA0Mgh1R7ihmNtYMjEjTMQYcS5f3rZeuxSxWoYjjDaogdQNJwwdN MfAq2AjUvNC3i8KKLT7xqAl7KqxphSR3E1xiL2OMEVOfXcfc8k4zRqOKyeucReWems/dH6zU+7vuR V/Eej20lre1jFwpPYIhUuhcJ7pex5UAzuj0S40WffAT8gJRuJUTkeuPu9LlkE6u/uvsAydO774Ax1 u5J1o+avtxanj+XKrs8Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5qRv-001ZXt-AL; Mon, 27 Jun 2022 15:14:51 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o5qRW-001ZNl-Ay for linux-arm-kernel@lists.infradead.org; Mon, 27 Jun 2022 15:14:28 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D87A6615D8; Mon, 27 Jun 2022 15:14:25 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 13489C341CE; Mon, 27 Jun 2022 15:14:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656342865; bh=TEVom3FUM/oNVm4RE9flaMx0vl4ZmbvxkFbUulP5aPU=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HBpYHpzRNhK4riXUAjrAA+McYC8WmhLWADtwkPPr/klyMCQAH+U+7H80ibLM7ChP4 PzxbhmBzu1aSLknoQliPC/DEJven2IWzF41YGtBbjM1IVYSAqHxQaI8t388aGIC3Mf IWP/fwy5XLNs1NHTYw3TvQxlggOT4O7Ew/poArECsIuGj+DjuT57ilrznttECSStNu d+XwvC7Lz+KXKPXUar2EuFqXx1Nm9ThIkEwGV71vh4HklRDy1JKnynfllcfMLhD/Ub C1RK6EKEi8a3mJMIxXH6YTDGKtv2315OeRjijASDyYfuI0tNFTWWfyXfdUAiwvuXdh ReJhQtnl65nlw== Received: from sofa.misterjones.org ([185.219.108.64] helo=why.lan) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1o5qRS-003TzH-SI; Mon, 27 Jun 2022 16:14:22 +0100 From: Marc Zyngier To: linux-arm-kernel@lists.infradead.org Cc: Will Deacon , Catalin Marinas , Mark Rutland , Ard Biesheuvel , broonie@kernel.org, danielmentz@google.com, saravanak@google.com, kernel-team@android.com Subject: [PATCH 1/6] arm64: Rename the VHE switch to "finalise_el2" Date: Mon, 27 Jun 2022 16:14:07 +0100 Message-Id: <20220627151412.1496361-2-maz@kernel.org> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20220627151412.1496361-1-maz@kernel.org> References: <20220627151412.1496361-1-maz@kernel.org> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: linux-arm-kernel@lists.infradead.org, will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com, ardb@kernel.org, broonie@kernel.org, danielmentz@google.com, saravanak@google.com, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220627_081426_471308_FBE07858 X-CRM114-Status: GOOD ( 21.49 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org as we are about to perform a lot more in 'mutate_to_vhe' than we currently do, this function really becomes the point where we finalise the basic EL2 configuration. Reflect this into the code by renaming a bunch of things: - HVC_VHE_RESTART -> HVC_FINALISE_EL2 - switch_to_vhe --> finalise_el2 - mutate_to_vhe -> __finalise_el2 No functional changes. Signed-off-by: Marc Zyngier --- Documentation/virt/kvm/arm/hyp-abi.rst | 2 +- arch/arm64/include/asm/virt.h | 4 ++-- arch/arm64/kernel/head.S | 6 +++--- arch/arm64/kernel/hyp-stub.S | 21 ++++++++++----------- arch/arm64/kernel/sleep.S | 2 +- 5 files changed, 17 insertions(+), 18 deletions(-) diff --git a/Documentation/virt/kvm/arm/hyp-abi.rst b/Documentation/virt/kvm/arm/hyp-abi.rst index 4d43fbc25195..0967acbff560 100644 --- a/Documentation/virt/kvm/arm/hyp-abi.rst +++ b/Documentation/virt/kvm/arm/hyp-abi.rst @@ -60,7 +60,7 @@ these functions (see arch/arm{,64}/include/asm/virt.h): * :: - x0 = HVC_VHE_RESTART (arm64 only) + x0 = HVC_FINALISE_EL2 (arm64 only) Attempt to upgrade the kernel's exception level from EL1 to EL2 by enabling the VHE mode. This is conditioned by the CPU supporting VHE, the EL2 MMU diff --git a/arch/arm64/include/asm/virt.h b/arch/arm64/include/asm/virt.h index 0e80db4327b6..dec6eee0eda5 100644 --- a/arch/arm64/include/asm/virt.h +++ b/arch/arm64/include/asm/virt.h @@ -36,9 +36,9 @@ #define HVC_RESET_VECTORS 2 /* - * HVC_VHE_RESTART - Upgrade the CPU from EL1 to EL2, if possible + * HVC_FINALISE_EL2 - Upgrade the CPU from EL1 to EL2, if possible */ -#define HVC_VHE_RESTART 3 +#define HVC_FINALISE_EL2 3 /* Max number of HYP stub hypercalls */ #define HVC_STUB_HCALL_NR 4 diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 6a98f1a38c29..f8550a939a6e 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -463,7 +463,7 @@ SYM_FUNC_START_LOCAL(__primary_switched) ret // to __primary_switch() 0: #endif - bl switch_to_vhe // Prefer VHE if possible + bl finalise_el2 // Prefer VHE if possible ldp x29, x30, [sp], #16 bl start_kernel ASM_BUG() @@ -553,7 +553,7 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) eret __cpu_stick_to_vhe: - mov x0, #HVC_VHE_RESTART + mov x0, #HVC_FINALISE_EL2 hvc #0 mov x0, #BOOT_CPU_MODE_EL2 ret @@ -634,7 +634,7 @@ SYM_FUNC_START_LOCAL(secondary_startup) /* * Common entry point for secondary CPUs. */ - bl switch_to_vhe + bl finalise_el2 bl __cpu_secondary_check52bitva bl __cpu_setup // initialise processor adrp x1, swapper_pg_dir diff --git a/arch/arm64/kernel/hyp-stub.S b/arch/arm64/kernel/hyp-stub.S index 43d212618834..26206e53e0c9 100644 --- a/arch/arm64/kernel/hyp-stub.S +++ b/arch/arm64/kernel/hyp-stub.S @@ -51,8 +51,8 @@ SYM_CODE_START_LOCAL(elx_sync) msr vbar_el2, x1 b 9f -1: cmp x0, #HVC_VHE_RESTART - b.eq mutate_to_vhe +1: cmp x0, #HVC_FINALISE_EL2 + b.eq __finalise_el2 2: cmp x0, #HVC_SOFT_RESTART b.ne 3f @@ -73,8 +73,8 @@ SYM_CODE_START_LOCAL(elx_sync) eret SYM_CODE_END(elx_sync) -// nVHE? No way! Give me the real thing! -SYM_CODE_START_LOCAL(mutate_to_vhe) +SYM_CODE_START_LOCAL(__finalise_el2) + // nVHE? No way! Give me the real thing! // Sanity check: MMU *must* be off mrs x1, sctlr_el2 tbnz x1, #0, 1f @@ -140,10 +140,10 @@ SYM_CODE_START_LOCAL(mutate_to_vhe) msr spsr_el1, x0 b enter_vhe -SYM_CODE_END(mutate_to_vhe) +SYM_CODE_END(__finalise_el2) // At the point where we reach enter_vhe(), we run with - // the MMU off (which is enforced by mutate_to_vhe()). + // the MMU off (which is enforced by __finalise_el2()). // We thus need to be in the idmap, or everything will // explode when enabling the MMU. @@ -222,9 +222,9 @@ SYM_FUNC_START(__hyp_reset_vectors) SYM_FUNC_END(__hyp_reset_vectors) /* - * Entry point to switch to VHE if deemed capable + * Entry point to finalise EL2 and switch to VHE if deemed capable */ -SYM_FUNC_START(switch_to_vhe) +SYM_FUNC_START(finalise_el2) // Need to have booted at EL2 adr_l x1, __boot_cpu_mode ldr w0, [x1] @@ -236,9 +236,8 @@ SYM_FUNC_START(switch_to_vhe) cmp x0, #CurrentEL_EL1 b.ne 1f - // Turn the world upside down - mov x0, #HVC_VHE_RESTART + mov x0, #HVC_FINALISE_EL2 hvc #0 1: ret -SYM_FUNC_END(switch_to_vhe) +SYM_FUNC_END(finalise_el2) diff --git a/arch/arm64/kernel/sleep.S b/arch/arm64/kernel/sleep.S index 4ea9392f86e0..c7e01ee0bda8 100644 --- a/arch/arm64/kernel/sleep.S +++ b/arch/arm64/kernel/sleep.S @@ -100,7 +100,7 @@ SYM_FUNC_END(__cpu_suspend_enter) .pushsection ".idmap.text", "awx" SYM_CODE_START(cpu_resume) bl init_kernel_el - bl switch_to_vhe + bl finalise_el2 bl __cpu_setup /* enable the MMU early - so we can access sleep_save_stash by va */ adrp x1, swapper_pg_dir