From patchwork Tue Jun 28 15:16:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 12898473 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 5D6D9C43334 for ; Tue, 28 Jun 2022 15:21:31 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-ID:Date:Subject:CC:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=an2FKfYdXMNkYvI9iV9goDmw5Xftozr0JkfTAwlI7x8=; b=KqFhoWQUVO/cmP KB+imnP43WIgIvz4qm4GO+DxpsARE3K+wZJinhWI2LsscVKTlPrp9WsW8iiHoqGCFnm6YK+ZDDjEv mU6wRGMp6pCcGbvLG3UVTnnmOy9lXvzE738TMMkjCqtecnJYSJOBc1Xd4aeAhkrs3L61AQGDfpye8 9nng0vA692dp5R1LQZB6pwdryDgI1qOqlHs7hcc9hM/xq+nEkCzQORA7uc0etK19EbJUmhoKzV874 E0yulCD5J0PbhEXLPDVUnHQU3P9i+CXT6Yg7bA6PmLvsRcAskH513TnV9wC562lvFMLf4bZ+ywJfC /D4jNMgWL4uQlcjU6J7Q==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6D0g-006s6l-Tn; Tue, 28 Jun 2022 15:20:15 +0000 Received: from esa.microchip.iphmx.com ([68.232.154.123]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6CvS-006q52-4q for linux-arm-kernel@lists.infradead.org; Tue, 28 Jun 2022 15:14:52 +0000 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1656429290; x=1687965290; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=QAXYAwZhToLKlFioytUapwk35HsjItBcFPm+VR8gqj8=; b=xDz+F4ruFhI4IL+fBNeQ/z1IbC0wSGIUBD/XK/8iamFnwBTIjhYKCrsx Cb9rcUZeLzIm00JOvG+4tPpxnqcR9BhIPBK/3Awl0uOCuLzNEaNfppUe3 mnUekQ1toJWb7jDbmsVEB6uk7Q93c3W0rGqPuUk22n+5tpxjcv7x0ZjH/ 01/pLkcDCQgEwd7HDywxc6PP7exS2lPheksMZkG0PzyAJGfnmBpGhp61c BQurCCKSh5tBR+Hl04FrtXjTUUOHDvvejPzp7fWEZ3BADnBOhtQ2p6Mcc Ynsg3eaE7HXbgxOzNTFn6VtguhQqMIzNuo0gKXzSWeacqUcHCHjpamgAm A==; X-IronPort-AV: E=Sophos;i="5.92,229,1650956400"; d="scan'208";a="162420900" Received: from unknown (HELO email.microchip.com) ([170.129.1.10]) by esa4.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 28 Jun 2022 08:14:46 -0700 Received: from chn-vm-ex01.mchp-main.com (10.10.85.143) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2375.17; Tue, 28 Jun 2022 08:14:44 -0700 Received: from localhost.localdomain (10.10.115.15) by chn-vm-ex01.mchp-main.com (10.10.85.143) with Microsoft SMTP Server id 15.1.2375.17 via Frontend Transport; Tue, 28 Jun 2022 08:14:41 -0700 From: Claudiu Beznea To: , , , , , , , CC: , , , Subject: [PATCH v2 09/19] iio: adc: at91-sama5d2_adc: add .read_avail() chan_info ops Date: Tue, 28 Jun 2022 18:16:21 +0300 Message-ID: <20220628151631.3116454-10-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20220628151631.3116454-1-claudiu.beznea@microchip.com> References: <20220628151631.3116454-1-claudiu.beznea@microchip.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220628_081450_364437_55CC77AC X-CRM114-Status: GOOD ( 12.33 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Add .read_avail() to chan_info ops which will retrieve the available oversampling ratio. Suggested-by: Jonathan Cameron Signed-off-by: Claudiu Beznea --- drivers/iio/adc/at91-sama5d2_adc.c | 50 +++++++++++++++++++++--------- 1 file changed, 35 insertions(+), 15 deletions(-) diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c index 1dd64e1d999e..2242ee8dde68 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -319,6 +319,8 @@ static const struct at91_adc_reg_layout sama7g5_layout = { .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ)|\ BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available = \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ .datasheet_name = "CH"#num, \ .indexed = 1, \ } @@ -340,6 +342,8 @@ static const struct at91_adc_reg_layout sama7g5_layout = { .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ)|\ BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available = \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ .datasheet_name = "CH"#num"-CH"#num2, \ .indexed = 1, \ } @@ -359,6 +363,8 @@ static const struct at91_adc_reg_layout sama7g5_layout = { .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ)|\ BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available = \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ .datasheet_name = name, \ } #define AT91_SAMA5D2_CHAN_PRESSURE(num, name) \ @@ -374,6 +380,8 @@ static const struct at91_adc_reg_layout sama7g5_layout = { .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ .info_mask_shared_by_all = BIT(IIO_CHAN_INFO_SAMP_FREQ)|\ BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ + .info_mask_shared_by_all_available = \ + BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \ .datasheet_name = name, \ } @@ -398,6 +406,8 @@ static const struct at91_adc_reg_layout sama7g5_layout = { * than the total channel number) * @hw_trig_cnt: number of possible hardware triggers * @osr_mask: oversampling ratio bitmask on EMR register + * @oversampling_avail: available oversampling values + * @oversampling_avail_no: number of available oversampling values */ struct at91_adc_platform { const struct at91_adc_reg_layout *layout; @@ -410,6 +420,8 @@ struct at91_adc_platform { unsigned int max_index; unsigned int hw_trig_cnt; unsigned int osr_mask; + unsigned int oversampling_avail[3]; + unsigned int oversampling_avail_no; }; /** @@ -609,6 +621,8 @@ static const struct at91_adc_platform sama5d2_platform = { #define AT91_SAMA5D2_HW_TRIG_CNT 3 .hw_trig_cnt = AT91_SAMA5D2_HW_TRIG_CNT, .osr_mask = GENMASK(17, 16), + .oversampling_avail = { 1, 4, 16, }, + .oversampling_avail_no = 3, }; static const struct at91_adc_platform sama7g5_platform = { @@ -625,6 +639,8 @@ static const struct at91_adc_platform sama7g5_platform = { #define AT91_SAMA7G5_HW_TRIG_CNT 3 .hw_trig_cnt = AT91_SAMA7G5_HW_TRIG_CNT, .osr_mask = GENMASK(18, 16), + .oversampling_avail = { 1, 4, 16, }, + .oversampling_avail_no = 3, }; static int at91_adc_chan_xlate(struct iio_dev *indio_dev, int chan) @@ -1682,6 +1698,24 @@ static int at91_adc_write_raw(struct iio_dev *indio_dev, } } +static int at91_adc_read_avail(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + const int **vals, int *type, int *length, + long mask) +{ + struct at91_adc_state *st = iio_priv(indio_dev); + + switch (mask) { + case IIO_CHAN_INFO_OVERSAMPLING_RATIO: + *vals = (int *)st->soc_info.platform->oversampling_avail; + *type = IIO_VAL_INT; + *length = st->soc_info.platform->oversampling_avail_no; + return IIO_AVAIL_LIST; + default: + return -EINVAL; + } +} + static void at91_adc_dma_init(struct at91_adc_state *st) { struct device *dev = &st->indio_dev->dev; @@ -1869,20 +1903,6 @@ static IIO_DEVICE_ATTR(hwfifo_watermark, 0444, static IIO_CONST_ATTR(hwfifo_watermark_min, "2"); static IIO_CONST_ATTR(hwfifo_watermark_max, AT91_HWFIFO_MAX_SIZE_STR); -static IIO_CONST_ATTR(oversampling_ratio_available, - __stringify(1) " " - __stringify(4) " " - __stringify(16)); - -static struct attribute *at91_adc_attributes[] = { - &iio_const_attr_oversampling_ratio_available.dev_attr.attr, - NULL, -}; - -static const struct attribute_group at91_adc_attribute_group = { - .attrs = at91_adc_attributes, -}; - static const struct attribute *at91_adc_fifo_attributes[] = { &iio_const_attr_hwfifo_watermark_min.dev_attr.attr, &iio_const_attr_hwfifo_watermark_max.dev_attr.attr, @@ -1892,7 +1912,7 @@ static const struct attribute *at91_adc_fifo_attributes[] = { }; static const struct iio_info at91_adc_info = { - .attrs = &at91_adc_attribute_group, + .read_avail = &at91_adc_read_avail, .read_raw = &at91_adc_read_raw, .write_raw = &at91_adc_write_raw, .update_scan_mode = &at91_adc_update_scan_mode,