| Message ID | 20220630090157.29486-3-xiangsheng.hou@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: dts: mt8173: Fix nor flash node | expand |
On 30/06/2022 11:01, Xiangsheng Hou wrote: > For mt8173, it is needed to add the axi clock for dma mode. > And it is may needed to adjust default spi frequency. > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> > --- > .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml > index 41e60fe4b09f..7523d992a614 100644 > --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml > +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml > @@ -61,6 +61,12 @@ properties: > - const: axi > - const: axi_s > > + assigned-clocks: > + maxItems: 1 > + > + assigned-clock-parents: > + maxItems: 1 > + There is usually no reason to put this in the bindings. > required: > - compatible > - reg > @@ -82,8 +88,8 @@ examples: > compatible = "mediatek,mt8173-nor"; > reg = <0 0x1100d000 0 0xe0>; > interrupts = <1>; > - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>; > - clock-names = "spi", "sf"; > + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>; > + clock-names = "spi", "sf", "axi"; > #address-cells = <1>; > #size-cells = <0>; > Best regards, Krzysztof
On Thu, 2022-06-30 at 20:41 +0200, Krzysztof Kozlowski wrote: > On 30/06/2022 11:01, Xiangsheng Hou wrote: > > For mt8173, it is needed to add the axi clock for dma mode. > > And it is may needed to adjust default spi frequency. > > > > Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> > > --- > > .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 10 > > ++++++++-- > > 1 file changed, 8 insertions(+), 2 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi- > > mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi- > > mtk-nor.yaml > > index 41e60fe4b09f..7523d992a614 100644 > > --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk- > > nor.yaml > > +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk- > > nor.yaml > > @@ -61,6 +61,12 @@ properties: > > - const: axi > > - const: axi_s > > > > + assigned-clocks: > > + maxItems: 1 > > + > > + assigned-clock-parents: > > + maxItems: 1 > > + > > There is usually no reason to put this in the bindings. > Will be remove in next patch.
diff --git a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml index 41e60fe4b09f..7523d992a614 100644 --- a/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml +++ b/Documentation/devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml @@ -61,6 +61,12 @@ properties: - const: axi - const: axi_s + assigned-clocks: + maxItems: 1 + + assigned-clock-parents: + maxItems: 1 + required: - compatible - reg @@ -82,8 +88,8 @@ examples: compatible = "mediatek,mt8173-nor"; reg = <0 0x1100d000 0 0xe0>; interrupts = <1>; - clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>; - clock-names = "spi", "sf"; + clocks = <&pericfg CLK_PERI_SPI>, <&topckgen CLK_TOP_SPINFI_IFR_SEL>, <&pericfg CLK_PERI_NFI>; + clock-names = "spi", "sf", "axi"; #address-cells = <1>; #size-cells = <0>;
For mt8173, it is needed to add the axi clock for dma mode. And it is may needed to adjust default spi frequency. Signed-off-by: Xiangsheng Hou <xiangsheng.hou@mediatek.com> --- .../devicetree/bindings/spi/mediatek,spi-mtk-nor.yaml | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-)