From patchwork Thu Jun 30 14:42:27 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 12901949 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id E86E2C433EF for ; Thu, 30 Jun 2022 14:44:19 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=mjpNad34rSAsHqJOdfg6lCpLSB0gdT6couNFaIBnUIU=; b=W1rrYRXjsREjsd RQqVPNfKbcxrX2TSTtNi290yCwdEWxfec9j02E9pPTuudgHZmjOvgdAJq0mGTO3plX8qIvWmcxQkT tKG1KYk3OqbgAIhKq00F5ORCElizBVpk9mVO8ydH5Ofb8U85jsbJEGHc3hylJ9AS3knJdFBya9pxS 4WHIEDtYJfu9TGjthOOn7u4t0RwwONcNUJxzxjR9MHdMnUr5L/nnPhp/Nsv1zlekg1LPHcY3TWzTI tYcKV3+RN6fqrNJIWbVKRx8cf8AzMKB9pArDwdouSoKi49uy1IjoImkaa8DJF+ONnqbvJNEYCTDmY S9f3tRByHsrWwek86YWA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6vNz-0007oh-4N; Thu, 30 Jun 2022 14:43:15 +0000 Received: from dfw.source.kernel.org ([2604:1380:4641:c500::1]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o6vNS-0007fM-8W for linux-arm-kernel@lists.infradead.org; Thu, 30 Jun 2022 14:42:43 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id D2A626232A; Thu, 30 Jun 2022 14:42:41 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B6A10C341CC; Thu, 30 Jun 2022 14:42:39 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656600161; bh=NncCjvt4+51bdakgsRg19upHSCRxlcIVp95M4/z6w4w=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=iEf9R1jzcATeDkN4g6pB1Io4gSrFnJbBMNN6gt1PTSxqSmfz1+C7dcN/QCmWzZMZn g79TD19LZNWXcLjSds1sv57nZTJTi8j3grBKxjtMVNZWQtQjv947JsH8RvqLIu7bDp qNnonVXGjBx5s3NWai5ikDp6G8ZrHpzWXKy9PqpZlAb6Yr42VKwzDRm1An0tKc557Q BYPS8r579YliHzRgpuVt/DkiZzdcrzzVKjw2AdAnNUIiOB12NwCN3nvV+O46LisRYb Wun4Tvp7ztl9rZzimB2JAF6uXjusul1Vq7jWsFAjJnOODWRZLiAVWn5ecMhbRJcNzr b2dAABPXMu4IQ== From: Ard Biesheuvel To: linux-arm-kernel@lists.infradead.org Cc: Ard Biesheuvel , Will Deacon , Marc Zyngier , =?utf-8?q?Pierre-Cl=C3=A9ment_Tosi?= , Quentin Perret , Mark Rutland Subject: [PATCH 3/6] arm64: head: record the MMU state at primary entry Date: Thu, 30 Jun 2022 16:42:27 +0200 Message-Id: <20220630144230.2332555-4-ardb@kernel.org> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220630144230.2332555-1-ardb@kernel.org> References: <20220630144230.2332555-1-ardb@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2408; h=from:subject; bh=NncCjvt4+51bdakgsRg19upHSCRxlcIVp95M4/z6w4w=; b=owEB7QES/pANAwAKAcNPIjmS2Y8kAcsmYgBivbZOROjfUk2KvV9kdvYVpuikW8TiFeJ3VqL36aF6 Gw9BCteJAbMEAAEKAB0WIQT72WJ8QGnJQhU3VynDTyI5ktmPJAUCYr22TgAKCRDDTyI5ktmPJGX4C/ 4kZcgz4l8Z+rJ+33sdxreXrLv+4XIAYuHHU9bVORx7o3Bc3FZM1i5RtslRDkn/J5ucu2y92+DwMdT1 rh3iwrNmGnePqQQr/OoTI59XCXaP2dLOatiNKYO0VtpblGz7iwmfY7o3F3oh88pwhq14xNwH4cRGW2 kyukeMTnIcMkUPo6/ci9Xv0NG6dG2Jnc6bKlHLbeQgzyGQC5/qjHZ7yNddP7hdUdHg0MIk7KJHrKCm HHTfWb2qYDCtgLPWQeeeoU0a1Go8oiVomjOej7Qpx4Xcz0h0khIRAvqPWa9ZsBx3+YOi6XtvzB5Bf5 aUseB9M9w3D4tOEONfsIN4054MehKhDrSx2JnRXwIHCS1TXTurn6uI7pIFCk6J4PoFVCVQjxjhsaDh 9szwvjOASmb3jxAhmsTxgn5iDAJbE8iyQqlw4n0B4Xrnmmvu0n76Vqf/p9utnZJLgU3RPvTqxKDxjM PobhqxnL6BV3bfe5QJ8rXNVDz6BRgp1N9Sok9MnNpkQEk= X-Developer-Key: i=ardb@kernel.org; a=openpgp; fpr=F43D03328115A198C90016883D200E9CA6329909 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220630_074242_422104_B392E841 X-CRM114-Status: GOOD ( 10.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Prepare for being able to deal with primary entry with the MMU and caches enabled, by recording whether or not we entered with the MMU on in register x19. While at it, add disable_mmu_workaround macro invocations to init_kernel_el, as its manipulation of SCTLR_ELx may amount to disabling of the MMU after subsequent patches. Signed-off-by: Ard Biesheuvel --- arch/arm64/kernel/head.S | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S index 2210bbd13cf9..a79c842395ee 100644 --- a/arch/arm64/kernel/head.S +++ b/arch/arm64/kernel/head.S @@ -77,6 +77,7 @@ * primary lowlevel boot path: * * Register Scope Purpose + * x19 primary_entry() .. start_kernel() whether we entered with the MMU on * x20 primary_entry() .. __primary_switch() CPU boot mode * x21 primary_entry() .. start_kernel() FDT pointer passed at boot in x0 * x22 create_idmap() .. start_kernel() ID map VA of the DT blob @@ -85,6 +86,7 @@ * x28 create_idmap() callee preserved temp register */ SYM_CODE_START(primary_entry) + bl record_mmu_state bl preserve_boot_args bl init_kernel_el // w0=cpu_boot_mode mov x20, x0 @@ -107,6 +109,17 @@ SYM_CODE_START(primary_entry) b __primary_switch SYM_CODE_END(primary_entry) +SYM_CODE_START_LOCAL(record_mmu_state) + mrs x19, CurrentEL + cmp x19, #CurrentEL_EL2 + mrs x19, sctlr_el1 + b.ne 0f + mrs x19, sctlr_el2 +0: tst x19, #SCTLR_ELx_M + cset w19, ne + ret +SYM_CODE_END(record_mmu_state) + /* * Preserve the arguments passed by the bootloader in x0 .. x3 */ @@ -484,6 +497,7 @@ SYM_FUNC_START(init_kernel_el) SYM_INNER_LABEL(init_el1, SYM_L_LOCAL) mov_q x0, INIT_SCTLR_EL1_MMU_OFF + pre_disable_mmu_workaround msr sctlr_el1, x0 isb mov_q x0, INIT_PSTATE_EL1 @@ -515,6 +529,7 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) /* Switching to VHE requires a sane SCTLR_EL1 as a start */ mov_q x0, INIT_SCTLR_EL1_MMU_OFF + pre_disable_mmu_workaround msr_s SYS_SCTLR_EL12, x0 /* @@ -530,6 +545,7 @@ SYM_INNER_LABEL(init_el2, SYM_L_LOCAL) 1: mov_q x0, INIT_SCTLR_EL1_MMU_OFF + pre_disable_mmu_workaround msr sctlr_el1, x0 msr elr_el2, lr