From patchwork Mon Jul 4 17:02:44 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Mark Brown X-Patchwork-Id: 12905697 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CA3A3C433EF for ; Mon, 4 Jul 2022 17:07:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=XI2CV2nN0ACB5geZ6yuauCWbd+YyjxXG6GOW/vGFCws=; b=OkOuCzf+T38WGQ bI7A2IASjXSbIzcHS0lw5cSgxfhui9R0KguJ11Xi8yzFdFEXvhgGjhdGZSzG0rzQ9ZRcuX55swvwI aRhp6HNLGjt3qT1XMRCEWYXe2fBVMG6OwyADnvrvgyHtfTdqpbW0apQd43tWfLW6TawNUICcpP4jB 5LLM3FTvtCAN7h6hZL2J8gDSIBKDGSdGug7QXG78MdNQQAR04KilqmyTaOzNvUV+xPCpEZ9edzIqq zugv8WQchKNqFngvL66JqPlk7g1j5FEg2hKy4zOUZoWixhKL+3txmDx+yHb9OUTm+cD4+O6gaJQ4F cGbPFZWWO3jyJeRO5Jxw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8PWQ-00AAUL-Vj; Mon, 04 Jul 2022 17:06:07 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o8PU8-00A9Le-Vv for linux-arm-kernel@lists.infradead.org; Mon, 04 Jul 2022 17:03:46 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 94096614FC; Mon, 4 Jul 2022 17:03:44 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 941BFC341CD; Mon, 4 Jul 2022 17:03:42 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1656954224; bh=M9K1IP/4je0NJDdGU+JfzHhZp0G/9AEcSVbv+FX+CYk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=W609SzfC81hoqlIBQiluh4m63mqM0HHM/2jRSgxlByC7nEvsKU6jHnnh/r1eDvR7p x38oDbU6a8Mi8i2etyfK/pRdDB0r9vxlQcETj9zILsy1inaBOCIbSLiePn7z8moHRc cWMoi/urcgExvNC2/dulYxfpijFm/EYAfN+fJ87C26zfte4dvNPEMUnj/kxPDzO2ZY mYOl6tfr1J+TsFHgrp35UFGqpcwryNBrasJ1bZPMe0bvXjUD2k1WEhLLTsDvwuSUCe 8E+y+UKALiK1+egCq1GBy55OqzbpXF0KNYKn0CMIBPKPF36nLKwdTBVa+HxXAv7RC6 5hUD1iY/zUZHw== From: Mark Brown To: Catalin Marinas , Will Deacon Cc: Mark Rutland , Joey Gouly , linux-arm-kernel@lists.infradead.org, Mark Brown Subject: [PATCH v7 10/28] arm64/sysreg: Make BHB clear feature defines match the architecture Date: Mon, 4 Jul 2022 18:02:44 +0100 Message-Id: <20220704170302.2609529-11-broonie@kernel.org> X-Mailer: git-send-email 2.30.2 In-Reply-To: <20220704170302.2609529-1-broonie@kernel.org> References: <20220704170302.2609529-1-broonie@kernel.org> MIME-Version: 1.0 X-Developer-Signature: v=1; a=openpgp-sha256; l=2240; h=from:subject; bh=M9K1IP/4je0NJDdGU+JfzHhZp0G/9AEcSVbv+FX+CYk=; b=owEBbQGS/pANAwAKASTWi3JdVIfQAcsmYgBiwx020p2ch/rszXUh2C+W61GjGITDYyeLuRALUsi3 uLOnhdGJATMEAAEKAB0WIQSt5miqZ1cYtZ/in+ok1otyXVSH0AUCYsMdNgAKCRAk1otyXVSH0J/2B/ 4x3oJYp5clljOukv2QdaXkExa1bexDBuYuSLbW+FEA3RsT3PhOfWSytzAmRNjnZt5mHa+6zyN4EUBJ sSKu5+ezwMao5E8YZO95oYdH7t9mTerF0MqEdAxRgKTBdJjlJ+CNtepcLdYv60tIqpXhO8hm6ntu6O dkDj3LtA8HqHxHf3iPAAmVQLsRyO7cBgtrBl3y/bkYvVd9rjBTngQxtD/Nzx4GH7/N/lWUUL76+bRS n/+eJ2fOBCxPTSkhatax4ZsPHT8Gy/PBHcOiAbfXXFqaIGhAIdlm+I+MlItgHcSkB2TqfpEmoyGBgM ollCtDtaP6Kb+i48djg8zsneLpBAel X-Developer-Key: i=broonie@kernel.org; a=openpgp; fpr=3F2568AAC26998F9E813A1C5C3F436CA30F5D8EB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220704_100345_157513_5619E68B X-CRM114-Status: GOOD ( 15.42 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The architecture refers to the field identifying support for BHB clear as BC but the kernel has called it CLEARBHB. In preparation for generation of defines for ID_AA64ISAR2_EL1 rename to use the architecture's naming. No functional changes. Signed-off-by: Mark Brown --- arch/arm64/include/asm/cpufeature.h | 2 +- arch/arm64/include/asm/sysreg.h | 2 +- arch/arm64/kernel/cpufeature.c | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm64/include/asm/cpufeature.h b/arch/arm64/include/asm/cpufeature.h index 14a8f3d93add..6472f2badc97 100644 --- a/arch/arm64/include/asm/cpufeature.h +++ b/arch/arm64/include/asm/cpufeature.h @@ -673,7 +673,7 @@ static inline bool supports_clearbhb(int scope) isar2 = read_sanitised_ftr_reg(SYS_ID_AA64ISAR2_EL1); return cpuid_feature_extract_unsigned_field(isar2, - ID_AA64ISAR2_CLEARBHB_SHIFT); + ID_AA64ISAR2_BC_SHIFT); } const struct cpumask *system_32bit_el0_cpumask(void); diff --git a/arch/arm64/include/asm/sysreg.h b/arch/arm64/include/asm/sysreg.h index 9f2656d2fce3..34bf421c52df 100644 --- a/arch/arm64/include/asm/sysreg.h +++ b/arch/arm64/include/asm/sysreg.h @@ -738,7 +738,7 @@ #define ID_AA64ISAR1_GPI_IMP 0x1 /* id_aa64isar2 */ -#define ID_AA64ISAR2_CLEARBHB_SHIFT 28 +#define ID_AA64ISAR2_BC_SHIFT 28 #define ID_AA64ISAR2_APA3_SHIFT 12 #define ID_AA64ISAR2_GPA3_SHIFT 8 #define ID_AA64ISAR2_RPRES_SHIFT 4 diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c index 838b3dcd8473..0f9c9d8b21a2 100644 --- a/arch/arm64/kernel/cpufeature.c +++ b/arch/arm64/kernel/cpufeature.c @@ -231,7 +231,7 @@ static const struct arm64_ftr_bits ftr_id_aa64isar1[] = { }; static const struct arm64_ftr_bits ftr_id_aa64isar2[] = { - ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_CLEARBHB_SHIFT, 4, 0), + ARM64_FTR_BITS(FTR_HIDDEN, FTR_STRICT, FTR_HIGHER_SAFE, ID_AA64ISAR2_BC_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH), FTR_STRICT, FTR_EXACT, ID_AA64ISAR2_APA3_SHIFT, 4, 0), ARM64_FTR_BITS(FTR_VISIBLE_IF_IS_ENABLED(CONFIG_ARM64_PTR_AUTH),