From patchwork Wed Jul 6 18:31:12 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Pali_Roh=C3=A1r?= X-Patchwork-Id: 12908491 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CCBFDC433EF for ; Wed, 6 Jul 2022 18:39:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=rX0+iE9M1EGOlAiVb8v4Bs1v0wABTlCrdXfPxSFjhgk=; b=AOdd7j70i+sKU7 3EUzkhLKwNXMMJtcpRzT90Vi6JLmDHdtRM25qYudHjLTMBENN/BupTKI1npIanXLUuZRpwik005lr 5z3j5FBSHL82OB/uhwTZjYqZHgxoH+K/Z48tRK5+3mU/XwprxL/Kt+1aaQzrAozqsopI1X4OeeBM7 C+a5/W6wmzqZ4+ks9s7ciNsQFo7IibnGVImxpRRGtSYriVe7a9R2A96q84OmeIn89qWsArUEwc0oI 6viz1PF9G04vkzEhsqVXKF2WWDkdPAvlwunXzJH/Mh//fA+aNGm2CbNuUTV8TUK/sA6dI/l4+3dim 8CPq5hkSSO4CeWUsg9BQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1o99uf-00C0c6-Oz; Wed, 06 Jul 2022 18:38:14 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1o99rT-00BzGZ-7G for linux-arm-kernel@lists.infradead.org; Wed, 06 Jul 2022 18:34:57 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id B51166201A; Wed, 6 Jul 2022 18:34:54 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 61098C3411C; Wed, 6 Jul 2022 18:34:54 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1657132494; bh=/PRqhXfoMAMe1uTp35V4AGMKnm98tSJQbAkiI3gqq+Q=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=n0LOW1qgyZ/IuXyO6WKx0ucz0M9/Sjp0XIOdZ02/byDL7eu+Dy0iWKvWYDCUqxROk dQ5GZb8ENVeSdM2clye+SXt2E1wwOE3Mbis5o/qnxmQO67Dez1V2GCif3U3v6fePdw dWoOEYNMfZRwMeAALIf5IoNZCOlYKrF1BBce5+39ZTuENKYRVkAQstctU4jlmrUOpq SugSO0czGuJd0IR5FzhovOKNYk1vhUolYpmkql6I8UvB3JQa9+OiOTvRclqpgR5wsV vB9iFqu3ZEH99IzC6YUVwUuR+n89456t604CGcOgp5d4QhSDNgCDTUkJ7aNHJa3C4V NREJGMGazpZxQ== Received: by pali.im (Postfix) id 1ADE97BA; Wed, 6 Jul 2022 20:34:54 +0200 (CEST) From: =?utf-8?q?Pali_Roh=C3=A1r?= To: Andrew Lunn , Gregory Clement , Sebastian Hesselbarth , Rob Herring , =?utf-8?q?Marek_Beh=C3=BAn?= Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 09/11] ARM: dts: armada-380.dtsi: Add definitions for PCIe legacy INTx interrupts Date: Wed, 6 Jul 2022 20:31:12 +0200 Message-Id: <20220706183114.30783-10-pali@kernel.org> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20220706183114.30783-1-pali@kernel.org> References: <20220706183114.30783-1-pali@kernel.org> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220706_113455_440055_6C8EBE34 X-CRM114-Status: GOOD ( 12.76 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Signed-off-by: Pali Rohár --- arch/arm/boot/dts/armada-380.dtsi | 42 ++++++++++++++++++++++++++----- 1 file changed, 36 insertions(+), 6 deletions(-) diff --git a/arch/arm/boot/dts/armada-380.dtsi b/arch/arm/boot/dts/armada-380.dtsi index cff1269f3fbf..ce1dddb2269b 100644 --- a/arch/arm/boot/dts/armada-380.dtsi +++ b/arch/arm/boot/dts/armada-380.dtsi @@ -64,16 +64,26 @@ reg = <0x0800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x1 0 1 0 0x81000000 0 0 0x81000000 0x1 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie1_intc 0>, + <0 0 0 2 &pcie1_intc 1>, + <0 0 0 3 &pcie1_intc 2>, + <0 0 0 4 &pcie1_intc 3>; marvell,pcie-port = <0>; marvell,pcie-lane = <0>; clocks = <&gateclk 8>; status = "disabled"; + + pcie1_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; /* x1 port */ @@ -83,16 +93,26 @@ reg = <0x1000 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x2 0 1 0 0x81000000 0 0 0x81000000 0x2 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie2_intc 0>, + <0 0 0 2 &pcie2_intc 1>, + <0 0 0 3 &pcie2_intc 2>, + <0 0 0 4 &pcie2_intc 3>; marvell,pcie-port = <1>; marvell,pcie-lane = <0>; clocks = <&gateclk 5>; status = "disabled"; + + pcie2_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; /* x1 port */ @@ -102,16 +122,26 @@ reg = <0x1800 0 0 0 0>; #address-cells = <3>; #size-cells = <2>; + interrupt-names = "intx"; + interrupts-extended = <&gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; #interrupt-cells = <1>; ranges = <0x82000000 0 0 0x82000000 0x3 0 1 0 0x81000000 0 0 0x81000000 0x3 0 1 0>; bus-range = <0x00 0xff>; - interrupt-map-mask = <0 0 0 0>; - interrupt-map = <0 0 0 0 &gic GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie3_intc 0>, + <0 0 0 2 &pcie3_intc 1>, + <0 0 0 3 &pcie3_intc 2>, + <0 0 0 4 &pcie3_intc 3>; marvell,pcie-port = <2>; marvell,pcie-lane = <0>; clocks = <&gateclk 6>; status = "disabled"; + + pcie3_intc: interrupt-controller { + interrupt-controller; + #interrupt-cells = <1>; + }; }; }; };