From patchwork Sat Jul 9 15:23:54 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Conor Dooley X-Patchwork-Id: 12912249 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id DA67BC433EF for ; Sat, 9 Jul 2022 15:26:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=/VCtrqixONcT29SxQ3HK2QQFpOa4gdUgdH15qqCAoZ4=; b=2UOUjTfC1yXq1j BT9b/47jNSA/1owXR5pyR0R15JAR2Tu4GuBkPV5t/86hVif9YV20Q++0+tEkks4IRnCObW0CSEt5+ GnNiqUfhCbRjYItsXEH6pNBII8/SsPL0vB68k20BPhmenxkvvbKwDDybI+vd5LP3vwZeDgHXQSIhu zd4EeVPAOfRI5Egf6Y1PnQwQ7+VGM5LD+bOyvx2AQKNiEf8QwVvfUT//Q3UClWufJQ2TXThFcVLyt lXp6VL/jUIvrvJyW0cvG4C4M0o6DHRzNXYhXVl7mamXH4vKBXqPTphyTgHUEqOqZQQdky/OPQo1wq u6kcjrkuxbTH8q7WjMFA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oACKO-008RrF-AL; Sat, 09 Jul 2022 15:25:04 +0000 Received: from mail-wm1-x32c.google.com ([2a00:1450:4864:20::32c]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oACK4-008RiI-P7 for linux-arm-kernel@lists.infradead.org; Sat, 09 Jul 2022 15:24:48 +0000 Received: by mail-wm1-x32c.google.com with SMTP id z23-20020a7bc7d7000000b003a2e00222acso519900wmk.0 for ; Sat, 09 Jul 2022 08:24:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=conchuod.ie; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZvwkXF6SJyNdBT6GaKehBhnkInv+9xYsnjB27F2CrTA=; b=cWTxzGaC+PmqSgrWtYZ3lV2Ogppapc9JsZQQ4yuI9kyTwToYEt+TaRo1SNL2/8VSKZ NkKVvHZJo1U+XZV4hjmMqe2/kH3kABibGL2WK0pBrfbE0Qtm7IyJoyGvHaJiyWVDsy6a 6PNwjP3lexTIt5Z0I5TzwDPBe0eWxVtWM/umfUSkCmsxjMygGx+Px3h0W5JAxuZtPXKh Vhzb55MiyjYNhJwzKmJ7L4ysB6HgpMMhuwxGWehmJxzC7slj6tEb61vYZAaQDRLzf/7V Hmw8kOMwVVMndg6q5gHq79p1KQBMaJFPhzLOkTfujofWsAZI3myeO3nZDAD1ZrMCsaWe BMNQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZvwkXF6SJyNdBT6GaKehBhnkInv+9xYsnjB27F2CrTA=; b=6EhRm3Y2bU8ENfZCEjMSskez/CHfYI6jBTI+YNS3Jk1MDMaMkKu8kE8iI0YdU11wpv /M4Dr3dOWPGi1tgE7iO23FI1e0mirNCZ9EsU5V9lnObc5KQCbmYsz030VzRxaBqboEIm U4pusRa3+qEQlUX0O3C9MudA7UTJGp+cXSp4UGupOXS3ggTZIhvLvcMEhn06wtdpd5E3 1qw6qACkrsm2FRQbFk4fzXqR++OvadjtbtpMuhFm0Nq2NSAicGRO3Z7V9uZY6IUBiFUC YgvjoTm82vh9LmtkTsKtc1f2vrVttAmi/tdy55Dz+tSLdq/i+EVVIFmmfcjgYj7hfgmU PDUQ== X-Gm-Message-State: AJIora8cwrPOujAeZXBW7T6rbV93A5VL5InVTVS4IauD8zYc6ekKosw4 XNLCIGPqzw5OLdtx7bEQS0tA6Q== X-Google-Smtp-Source: AGRyM1su0j5S1ZJEHOgEYJAvl01nJ+NeZWkGFf5ZilleXbx20pC9durj+kh1JowffRW8wgnNtAhd/Q== X-Received: by 2002:a05:600c:1c0e:b0:3a1:9a4b:28ee with SMTP id j14-20020a05600c1c0e00b003a19a4b28eemr5840203wms.203.1657380280658; Sat, 09 Jul 2022 08:24:40 -0700 (PDT) Received: from henark71.. ([51.37.234.167]) by smtp.gmail.com with ESMTPSA id y12-20020a5d620c000000b0021d63fe0f03sm1626730wru.12.2022.07.09.08.24.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 09 Jul 2022 08:24:40 -0700 (PDT) From: Conor Dooley To: Paul Walmsley , Palmer Dabbelt , Palmer Dabbelt , Albert Ou , Sudeep Holla , Catalin Marinas , Will Deacon , Greg Kroah-Hartman , "Rafael J . Wysocki" Cc: Daire McNamara , Conor Dooley , Niklas Cassel , Damien Le Moal , Geert Uytterhoeven , Zong Li , Emil Renner Berthing , Jonas Hahnfeld , Guo Ren , Anup Patel , Atish Patra , Heiko Stuebner , Philipp Tomsich , Rob Herring , Marc Zyngier , Viresh Kumar , linux-riscv@lists.infradead.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, Brice Goglin Subject: [PATCH v3 1/2] arm64: topology: move store_cpu_topology() to shared code Date: Sat, 9 Jul 2022 16:23:54 +0100 Message-Id: <20220709152354.2856586-2-mail@conchuod.ie> X-Mailer: git-send-email 2.37.0 In-Reply-To: <20220709152354.2856586-1-mail@conchuod.ie> References: <20220709152354.2856586-1-mail@conchuod.ie> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220709_082444_901600_32DB7373 X-CRM114-Status: GOOD ( 19.10 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org From: Conor Dooley arm64's method of defining a default cpu topology requires only minimal changes to apply to RISC-V also. The current arm64 implementation exits early in a uniprocessor configuration by reading MPIDR & claiming that uniprocessor can rely on the default values. This is appears to be a hangover from prior to '3102bc0e6ac7 ("arm64: topology: Stop using MPIDR for topology information")', because the current code just assigns default values for multiprocessor systems. With the MPIDR references removed, store_cpu_topolgy() can be moved to the common arch_topology code. CC: stable@vger.kernel.org Signed-off-by: Conor Dooley Reviewed-by: Sudeep Holla --- arch/arm64/kernel/topology.c | 40 ------------------------------------ drivers/base/arch_topology.c | 19 +++++++++++++++++ 2 files changed, 19 insertions(+), 40 deletions(-) diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c index 869ffc4d4484..7889a00f5487 100644 --- a/arch/arm64/kernel/topology.c +++ b/arch/arm64/kernel/topology.c @@ -22,46 +22,6 @@ #include #include -void store_cpu_topology(unsigned int cpuid) -{ - struct cpu_topology *cpuid_topo = &cpu_topology[cpuid]; - u64 mpidr; - - if (cpuid_topo->package_id != -1) - goto topology_populated; - - mpidr = read_cpuid_mpidr(); - - /* Uniprocessor systems can rely on default topology values */ - if (mpidr & MPIDR_UP_BITMASK) - return; - - /* - * This would be the place to create cpu topology based on MPIDR. - * - * However, it cannot be trusted to depict the actual topology; some - * pieces of the architecture enforce an artificial cap on Aff0 values - * (e.g. GICv3's ICC_SGI1R_EL1 limits it to 15), leading to an - * artificial cycling of Aff1, Aff2 and Aff3 values. IOW, these end up - * having absolutely no relationship to the actual underlying system - * topology, and cannot be reasonably used as core / package ID. - * - * If the MT bit is set, Aff0 *could* be used to define a thread ID, but - * we still wouldn't be able to obtain a sane core ID. This means we - * need to entirely ignore MPIDR for any topology deduction. - */ - cpuid_topo->thread_id = -1; - cpuid_topo->core_id = cpuid; - cpuid_topo->package_id = cpu_to_node(cpuid); - - pr_debug("CPU%u: cluster %d core %d thread %d mpidr %#016llx\n", - cpuid, cpuid_topo->package_id, cpuid_topo->core_id, - cpuid_topo->thread_id, mpidr); - -topology_populated: - update_siblings_masks(cpuid); -} - #ifdef CONFIG_ACPI static bool __init acpi_cpu_is_threaded(int cpu) { diff --git a/drivers/base/arch_topology.c b/drivers/base/arch_topology.c index 441e14ac33a4..b7633bacbd31 100644 --- a/drivers/base/arch_topology.c +++ b/drivers/base/arch_topology.c @@ -845,4 +845,23 @@ void __init init_cpu_topology(void) } } } + +void store_cpu_topology(unsigned int cpuid) +{ + struct cpu_topology *cpuid_topo = &cpu_topology[cpuid]; + + if (cpuid_topo->package_id != -1) + goto topology_populated; + + cpuid_topo->thread_id = -1; + cpuid_topo->core_id = cpuid; + cpuid_topo->package_id = cpu_to_node(cpuid); + + pr_debug("CPU%u: package %d core %d thread %d\n", + cpuid, cpuid_topo->package_id, cpuid_topo->core_id, + cpuid_topo->thread_id); + +topology_populated: + update_siblings_masks(cpuid); +} #endif