From patchwork Mon Jul 11 12:25:02 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: AngeloGioacchino Del Regno X-Patchwork-Id: 12913450 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id F1963C43334 for ; Mon, 11 Jul 2022 12:26:25 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Message-Id:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=gaCdOnqt6ei+lKijxt8T8grerax9ke2omR3+zzwVHcU=; b=K9JRIRkCT/13Vm +HhMU3VuGLVUXrWiY4W+az8gmJbZdrepQO4pyT6cDj5axYKsFSwGWilMxYNj4Z+p89KSdkUk1TyMs RtzuHUbWUm8ZYkbPJiIrcIHc/y/9mpzzD+4BFMuQujj7dcX9Q9CpxXJDxyLzChPPrBmR6RWRy2wEl ZE1nwqjSI4yaccfeu9bTdnzPI40CTl2B9XXBFEkqnQhhNWJtxaFROsGo0/WR8KSBrM2BVSUNsZrCW 5/gkByO4Ix7khRUWBgukzDXo/t9OgwxcMZ1ZHZc/bIYXblamaq9aGqAOeqCIXEBB4SGJvn8WLbE+F +d9Vq8ejeAzx6MZmOQ8w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oAsTd-001OAh-6M; Mon, 11 Jul 2022 12:25:25 +0000 Received: from madras.collabora.co.uk ([46.235.227.172]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oAsTP-001O34-OK; Mon, 11 Jul 2022 12:25:15 +0000 Received: from IcarusMOD.eternityproject.eu (2-237-20-237.ip236.fastwebnet.it [2.237.20.237]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) (Authenticated sender: kholk11) by madras.collabora.co.uk (Postfix) with ESMTPSA id ADF4366019FE; Mon, 11 Jul 2022 13:25:08 +0100 (BST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=collabora.com; s=mail; t=1657542309; bh=WNj+Fngrs3bQ3s4zywv4THTLiM1Sc7weFg7rQrZYyA4=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ceyCqKo7TRKXqpMJLLjVVVxkeX7NFgcmBVwiHVgHiBdWcrBW4wXbasuam2Zv3o1Gq Etiy5WNb/pI0J2BHtC9mAvQo/cSHGBdpmV3t6zR4UELoDyyo5Bn4GKVzCHcAD2u+V0 6w2dBWmD8VEM6WdDolQBqFiGgmxPIgUNiNPoTA6VkkCdI6TZbi5JviazImVZ7JCX7G IeOY9F692AZPeAhqbSGzEuzgeP185qP1hdaDmgaegDAN8MZ5M8j5MiwA/++YH6jDVy UxEj155zUjI9vKvxhe4Hw37V5WBTOUIr/ZzPvNsNkibx5JYwHb3EjpzZnIgW7HOkXU e5Fgt1Cg8qqQg== From: AngeloGioacchino Del Regno To: robh+dt@kernel.org Cc: krzysztof.kozlowski+dt@linaro.org, matthias.bgg@gmail.com, angelogioacchino.delregno@collabora.com, chun-jie.chen@mediatek.com, weiyi.lu@mediatek.com, mbrugger@suse.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, kernel@collabora.com, nfraprado@collabora.com Subject: [PATCH 2/3] dt-bindings: power: mediatek: Update example to use phandle to syscon Date: Mon, 11 Jul 2022 14:25:02 +0200 Message-Id: <20220711122503.286743-3-angelogioacchino.delregno@collabora.com> X-Mailer: git-send-email 2.35.1 In-Reply-To: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> References: <20220711122503.286743-1-angelogioacchino.delregno@collabora.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220711_052512_085935_C030FEE1 X-CRM114-Status: GOOD ( 10.68 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org The preferred way of declaring this node is by using a phandle to syscon: update the example to reflect that. Signed-off-by: AngeloGioacchino Del Regno --- .../power/mediatek,power-controller.yaml | 125 +++++++++--------- 1 file changed, 63 insertions(+), 62 deletions(-) diff --git a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml index 848fdff7c9d8..bed059e4401d 100644 --- a/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml +++ b/Documentation/devicetree/bindings/power/mediatek,power-controller.yaml @@ -237,76 +237,77 @@ examples: scpsys: syscon@10006000 { compatible = "syscon", "simple-mfd"; reg = <0 0x10006000 0 0x1000>; + }; + }; - spm: power-controller { - compatible = "mediatek,mt8173-power-controller"; + spm: power-controller { + compatible = "mediatek,mt8173-power-controller"; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <1>; + syscon = <&scpsys>; + + /* power domains of the SoC */ + power-domain@MT8173_POWER_DOMAIN_VDEC { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>; + clock-names = "mm"; + #power-domain-cells = <0>; + }; + power-domain@MT8173_POWER_DOMAIN_VENC { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_VENC_SEL>; + clock-names = "mm", "venc"; + #power-domain-cells = <0>; + }; + power-domain@MT8173_POWER_DOMAIN_ISP { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>; + clock-names = "mm"; + #power-domain-cells = <0>; + }; + power-domain@MT8173_POWER_DOMAIN_MM { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>; + clock-names = "mm"; + #power-domain-cells = <0>; + mediatek,infracfg = <&infracfg>; + }; + power-domain@MT8173_POWER_DOMAIN_VENC_LT { + reg = ; + clocks = <&topckgen CLK_TOP_MM_SEL>, + <&topckgen CLK_TOP_VENC_LT_SEL>; + clock-names = "mm", "venclt"; + #power-domain-cells = <0>; + }; + power-domain@MT8173_POWER_DOMAIN_AUDIO { + reg = ; + #power-domain-cells = <0>; + }; + power-domain@MT8173_POWER_DOMAIN_USB { + reg = ; + #power-domain-cells = <0>; + }; + power-domain@MT8173_POWER_DOMAIN_MFG_ASYNC { + reg = ; + clocks = <&clk26m>; + clock-names = "mfg"; + #address-cells = <1>; + #size-cells = <0>; + #power-domain-cells = <1>; + + power-domain@MT8173_POWER_DOMAIN_MFG_2D { + reg = ; #address-cells = <1>; #size-cells = <0>; #power-domain-cells = <1>; - /* power domains of the SoC */ - power-domain@MT8173_POWER_DOMAIN_VDEC { - reg = ; - clocks = <&topckgen CLK_TOP_MM_SEL>; - clock-names = "mm"; - #power-domain-cells = <0>; - }; - power-domain@MT8173_POWER_DOMAIN_VENC { - reg = ; - clocks = <&topckgen CLK_TOP_MM_SEL>, - <&topckgen CLK_TOP_VENC_SEL>; - clock-names = "mm", "venc"; - #power-domain-cells = <0>; - }; - power-domain@MT8173_POWER_DOMAIN_ISP { - reg = ; - clocks = <&topckgen CLK_TOP_MM_SEL>; - clock-names = "mm"; - #power-domain-cells = <0>; - }; - power-domain@MT8173_POWER_DOMAIN_MM { - reg = ; - clocks = <&topckgen CLK_TOP_MM_SEL>; - clock-names = "mm"; + power-domain@MT8173_POWER_DOMAIN_MFG { + reg = ; #power-domain-cells = <0>; mediatek,infracfg = <&infracfg>; }; - power-domain@MT8173_POWER_DOMAIN_VENC_LT { - reg = ; - clocks = <&topckgen CLK_TOP_MM_SEL>, - <&topckgen CLK_TOP_VENC_LT_SEL>; - clock-names = "mm", "venclt"; - #power-domain-cells = <0>; - }; - power-domain@MT8173_POWER_DOMAIN_AUDIO { - reg = ; - #power-domain-cells = <0>; - }; - power-domain@MT8173_POWER_DOMAIN_USB { - reg = ; - #power-domain-cells = <0>; - }; - power-domain@MT8173_POWER_DOMAIN_MFG_ASYNC { - reg = ; - clocks = <&clk26m>; - clock-names = "mfg"; - #address-cells = <1>; - #size-cells = <0>; - #power-domain-cells = <1>; - - power-domain@MT8173_POWER_DOMAIN_MFG_2D { - reg = ; - #address-cells = <1>; - #size-cells = <0>; - #power-domain-cells = <1>; - - power-domain@MT8173_POWER_DOMAIN_MFG { - reg = ; - #power-domain-cells = <0>; - mediatek,infracfg = <&infracfg>; - }; - }; - }; }; }; };