diff mbox series

[-next,v2,1/2] cacheinfo: Use atomic allocation for percpu cache attributes

Message ID 20220715102609.2160689-1-sudeep.holla@arm.com (mailing list archive)
State New, archived
Headers show
Series [-next,v2,1/2] cacheinfo: Use atomic allocation for percpu cache attributes | expand

Commit Message

Sudeep Holla July 15, 2022, 10:26 a.m. UTC
On couple of architectures like RISC-V and ARM64, we need to detect
cache attribues quite early during the boot when the secondary CPUs
start. So we will call detect_cache_attributes in the atomic context
and since use of normal allocation can sleep, we will end up getting
"sleeping in the atomic context" bug splat.

In order avoid that, move the allocation to use atomic version in
preparation to move the actual detection of cache attributes in the
CPU hotplug path which is atomic.

Cc: Ionela Voinescu <ionela.voinescu@arm.com>
Tested-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
---
 drivers/base/cacheinfo.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Hi Greg,

Can you apply these couple of patches directly if and when you are happy
with them ?

Regards,
Sudeep

v1->v2: This was added in v2

--
2.37.1

Comments

Conor Dooley July 15, 2022, 10:33 a.m. UTC | #1
On 15/07/2022 11:26, Sudeep Holla wrote:
> On couple of architectures like RISC-V and ARM64, we need to detect
> cache attribues quite early during the boot when the secondary CPUs
> start. So we will call detect_cache_attributes in the atomic context
> and since use of normal allocation can sleep, we will end up getting
> "sleeping in the atomic context" bug splat.
> 
> In order avoid that, move the allocation to use atomic version in
> preparation to move the actual detection of cache attributes in the
> CPU hotplug path which is atomic.
> 
> Cc: Ionela Voinescu <ionela.voinescu@arm.com>
> Tested-by: Conor Dooley <conor.dooley@microchip.com>

Since this was a conversion from comments on the other series:
Acked-by: Conor Dooley <conor.dooley@microchip.com>

> Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
> ---
>   drivers/base/cacheinfo.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
> 
> Hi Greg,
> 
> Can you apply these couple of patches directly if and when you are happy
> with them ?
> 
> Regards,
> Sudeep
> 
> v1->v2: This was added in v2
> 
> diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
> index 65d566ff24c4..4b5cd08c5a65 100644
> --- a/drivers/base/cacheinfo.c
> +++ b/drivers/base/cacheinfo.c
> @@ -356,7 +356,7 @@ int detect_cache_attributes(unsigned int cpu)
>   		return -ENOENT;
> 
>   	per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
> -					 sizeof(struct cacheinfo), GFP_KERNEL);
> +					 sizeof(struct cacheinfo), GFP_ATOMIC);
>   	if (per_cpu_cacheinfo(cpu) == NULL) {
>   		cache_leaves(cpu) = 0;
>   		return -ENOMEM;
> --
> 2.37.1
>
diff mbox series

Patch

diff --git a/drivers/base/cacheinfo.c b/drivers/base/cacheinfo.c
index 65d566ff24c4..4b5cd08c5a65 100644
--- a/drivers/base/cacheinfo.c
+++ b/drivers/base/cacheinfo.c
@@ -356,7 +356,7 @@  int detect_cache_attributes(unsigned int cpu)
 		return -ENOENT;

 	per_cpu_cacheinfo(cpu) = kcalloc(cache_leaves(cpu),
-					 sizeof(struct cacheinfo), GFP_KERNEL);
+					 sizeof(struct cacheinfo), GFP_ATOMIC);
 	if (per_cpu_cacheinfo(cpu) == NULL) {
 		cache_leaves(cpu) = 0;
 		return -ENOMEM;