From patchwork Fri Jul 15 11:00:21 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Allen-KH Cheng X-Patchwork-Id: 12919128 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 30D76C433EF for ; Fri, 15 Jul 2022 11:52:14 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:Message-ID:Date:Subject:CC :To:From:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:In-Reply-To:References: List-Owner; bh=8OjzVPb2KYQsyD5/zUgVZnjipIP6+DdXCqWFmEkQ5S0=; b=ErucqmFJlkL+CA Kpc8SJiPmcFAzMHSb2mW5K99l7FvlmNXvuDJiJdglHJMC1yFbh9XKhDRiP2QRWlqDRqej5VL02u7A cziVEZwy2VBVKU/u22uFqVD5I5xacx7ovxdetgOT2a1TdauSspgu8Ammv7ZT2PxNAqwPFTfaN3oM2 qLoUfVP+1JFoix8OED7s90d7poGYsMcP5255WIYZK3EGfKNyDvnrZEKk1OsVt4QJllHSfSV54UBDT J7ytNihqdVYEVGMTxGmFN8NpPaG2lVkubnrEPMUZ6hpqEbnFL9pXAZQ6bwi5MEUojltXiefB/n2Ev 0Ut8F+SjTEJVCUWpnhCA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1oCJqd-006k1r-U4; Fri, 15 Jul 2022 11:51:08 +0000 Received: from mailgw01.mediatek.com ([216.200.240.184]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1oCJqZ-006jzm-2B; Fri, 15 Jul 2022 11:51:05 +0000 X-UUID: e9bc3eea7afa456a9fc663f048c9c153-20220715 X-CID-P-RULE: Release_Ham X-CID-O-INFO: VERSION:1.1.8,REQID:9cbb9fe8-4723-42d5-b604-83ae55a7bab1,OB:0,LO B:0,IP:0,URL:0,TC:0,Content:0,EDM:0,RT:0,SF:0,FILE:0,RULE:Release_Ham,ACTI ON:release,TS:0 X-CID-META: VersionHash:0f94e32,CLOUDID:678b6764-0b3f-4b2c-b3a6-ed5c044366a0,C OID:IGNORED,Recheck:0,SF:nil,TC:nil,Content:0,EDM:-3,IP:nil,URL:0,File:nil ,QS:nil,BEC:nil,COL:0 X-UUID: e9bc3eea7afa456a9fc663f048c9c153-20220715 Received: from mtkmbs11n1.mediatek.inc [(172.21.101.185)] by mailgw01.mediatek.com (envelope-from ) (musrelay.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-GCM-SHA384 256/256) with ESMTP id 1115696312; Fri, 15 Jul 2022 04:50:55 -0700 Received: from mtkcas11.mediatek.inc (172.21.101.40) by mtkmbs10n2.mediatek.inc (172.21.101.183) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_CBC_SHA384) id 15.2.792.3; Fri, 15 Jul 2022 19:00:23 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 15 Jul 2022 19:00:23 +0800 From: Allen-KH Cheng To: Matthias Brugger , Rob Herring , Krzysztof Kozlowski CC: , , , , , "Chen-Yu Tsai" , , Allen-KH Cheng Subject: [PATCH] dt-bindings: mediatek: Add #reset-cells to mt8186 sys-clock controller Date: Fri, 15 Jul 2022 19:00:21 +0800 Message-ID: <20220715110021.3127-1-allen-kh.cheng@mediatek.com> X-Mailer: git-send-email 2.18.0 MIME-Version: 1.0 X-MTK: N X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220715_045103_121498_973B5169 X-CRM114-Status: UNSURE ( 8.03 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org MediaTek system clock controller includes reset controller and needs to specify the #reset-cells property. Signed-off-by: Allen-KH Cheng Acked-by: Rob Herring --- .../bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml index 0886e2e335bb..e6bdc79f058b 100644 --- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml +++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,mt8186-sys-clock.yaml @@ -39,6 +39,9 @@ properties: '#clock-cells': const: 1 + '#reset-cells': + const: 1 + required: - compatible - reg @@ -51,4 +54,5 @@ examples: compatible = "mediatek,mt8186-topckgen", "syscon"; reg = <0x10000000 0x1000>; #clock-cells = <1>; + #reset-cells = <1>; };